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authorPatrice Chotard <patrice.chotard@st.com>2018-04-11 17:07:45 +0200
committerTom Rini <trini@konsulko.com>2018-05-08 09:07:34 -0400
commit8b41464547330a39cc7e0ef87a5dd8f34db324e1 (patch)
treeea0eb1eb7e28a3dba811bed5f1532a3acc2e296a /env
parent274fb461f4792431b3777874472c8bd6149e6168 (diff)
clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
On all STM32F4 and F7 SoCs family (except STM32F429), PLLSAI output P can be used as 48MHz clock source for USB and SDMMC. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Tested By: Bruno Herrera <bruherrera@gmail.com>
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