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authorTom Rini <trini@konsulko.com>2020-07-24 08:43:08 -0400
committerTom Rini <trini@konsulko.com>2020-07-24 08:43:08 -0400
commitada61f1ee2a4eaa1b29d699b5ba940483171df8a (patch)
tree929b89181385f858187b207f82a46aea2d367e90 /env
parent7208396bbf1df1c7a85d263b7ff054e6b45d8240 (diff)
parentecb70bdb9f12b694e3a50895a759119b3fc27507 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix SiFive HiFive Unleashed board booting failure problem. - Enable SiFive fu540 PWM driver. - Support SiFive fu540: SPI boot. - Update OpenSBI used for RISC-V CI testing. - Revert "riscv: Allow use of reset drivers". - Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"". - sysreset: syscon: - Don't assume default value for offset and mask property. - Support value property. - qemu: Add syscon reboot and poweroff support. - Fix SIFIVE debug serial dependency. - Fix linking error when building u-boot-spl with no SMP support. - AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg. - Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi - SiFive fu540 avoid using hardcoded ram base and size.
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