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| author | Simon Glass <sjg@chromium.org> | 2019-12-06 21:42:12 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-12-15 11:44:15 +0800 |
| commit | 42791100180943c0f776a325843c66540e9595e7 (patch) | |
| tree | df632b0cb2d5939b0ab4a6681f2ac8dfd4fd0a2e /include/ACEX1K.h | |
| parent | ea4e97a511483dfd61b1417f935a7ed97e5565f9 (diff) | |
x86: Set up the MTRR for SDRAM
Set up MTRRs for the FSP SDRAM regions to improve performance.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/ACEX1K.h')
0 files changed, 0 insertions, 0 deletions