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authorMichal Simek <michal.simek@xilinx.com>2018-07-18 14:33:15 +0200
committerMichal Simek <michal.simek@xilinx.com>2018-10-16 14:58:45 +0200
commit3313ae668e0071f91cdf305fedb39b960beab62d (patch)
tree44f4cf48a8aa73e27a4eb61bdbdb09162ac311c6 /include/adc.h
parent892f93de61c375e8c3aabf03493af32115f51880 (diff)
spl: fpga: Implement fpga bistream loading with fpga_load
This patch partially reverts: "spl: fit: Add support for loading FPGA bitstream" (sha1: 26a642238bdecc53527142dc043b29e21c5cc94c) There shouldn't be a need to call private spl_load_fpga_image function because the whole sequence should be already handled by fpga framework. If there is missing loading bistream by chunks it should be done via fpga framework instead of having private hooks. Also spl_load_fpga_image() weak function is not used anywhere and opening a way for not reviewed hacks out of mainline U-Boot is not the right way to go. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include/adc.h')
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