diff options
| author | Sandeep Paulraj <s-paulraj@ti.com> | 2009-04-29 09:47:09 -0400 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2009-07-07 17:58:02 -0500 |
| commit | 0c1684437ef810c503df29e8d73f63191aa63862 (patch) | |
| tree | 41587a7ebb1b23f6d80ed121ff9de0adaf745c85 /include/asm-arm/arch-davinci/nand_defs.h | |
| parent | 6e29ed8e576a6900c5d8dcde36b423ac576894dc (diff) | |
ARM DaVinci: Changing ALE Mask Value
The ALE mask used by DaVinci SOCs is wrong. The patch changes the mask value
from '0xa' to '0x8'. This is the mask we use for all TI releases.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include/asm-arm/arch-davinci/nand_defs.h')
| -rw-r--r-- | include/asm-arm/arch-davinci/nand_defs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/include/asm-arm/arch-davinci/nand_defs.h index 70094e756d..ba75cd66c5 100644 --- a/include/asm-arm/arch-davinci/nand_defs.h +++ b/include/asm-arm/arch-davinci/nand_defs.h @@ -29,7 +29,7 @@ #include <asm/arch/hardware.h> #define MASK_CLE 0x10 -#define MASK_ALE 0x0a +#define MASK_ALE 0x08 #define NAND_READ_START 0x00 #define NAND_READ_END 0x30 |