diff options
author | Nishanth Menon <nm@ti.com> | 2009-11-09 09:29:34 -0500 |
---|---|---|
committer | Tom Rix <Tom.Rix@windriver.com> | 2009-11-27 16:26:17 -0600 |
commit | d414aae552bc229dafcad92028effb4a8306c7a5 (patch) | |
tree | 61893df2fd2a1685b47fb28fd7411b8afd288049 /include/asm-arm/arch-omap3/cpu.h | |
parent | 30563a04bff73fd4fbd840b846f4b6459759a839 (diff) |
OMAP3: Fix SDRC init
Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'include/asm-arm/arch-omap3/cpu.h')
-rw-r--r-- | include/asm-arm/arch-omap3/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h index 8ab2e391bc..e51c4f3293 100644 --- a/include/asm-arm/arch-omap3/cpu.h +++ b/include/asm-arm/arch-omap3/cpu.h @@ -222,6 +222,7 @@ struct sdrc { #define PAGEPOLICY_HIGH (0x1 << 0) #define SRFRONRESET (0x1 << 7) +#define PWDNEN (0x1 << 2) #define WAKEUPPROC (0x1 << 26) #define DDR_SDRAM (0x1 << 0) |