diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/asm-arm | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-davinci/nand_defs.h | 8 | ||||
-rw-r--r-- | include/asm-arm/arch-omap24xx/mem.h | 10 | ||||
-rw-r--r-- | include/asm-arm/global_data.h | 2 |
3 files changed, 10 insertions, 10 deletions
diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/include/asm-arm/arch-davinci/nand_defs.h index 619bd47973..187d3c3437 100644 --- a/include/asm-arm/arch-davinci/nand_defs.h +++ b/include/asm-arm/arch-davinci/nand_defs.h @@ -31,9 +31,9 @@ #define MASK_CLE 0x10 #define MASK_ALE 0x0a -#define NAND_CE0CLE ((volatile u_int8_t *)(CFG_NAND_BASE + 0x10)) -#define NAND_CE0ALE ((volatile u_int8_t *)(CFG_NAND_BASE + 0x0a)) -#define NAND_CE0DATA ((volatile u_int8_t *)CFG_NAND_BASE) +#define NAND_CE0CLE ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x10)) +#define NAND_CE0ALE ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x0a)) +#define NAND_CE0DATA ((volatile u_int8_t *)CONFIG_SYS_NAND_BASE) typedef struct { u_int32_t NRCSR; @@ -89,7 +89,7 @@ typedef volatile nand_registers *nandregs; #define NAND_READ_END 0x30 #define NAND_STATUS 0x70 -#ifdef CFG_NAND_HW_ECC +#ifdef CONFIG_SYS_NAND_HW_ECC #define NAND_Ecc_P1e (1 << 0) #define NAND_Ecc_P2e (1 << 1) #define NAND_Ecc_P4e (1 << 2) diff --git a/include/asm-arm/arch-omap24xx/mem.h b/include/asm-arm/arch-omap24xx/mem.h index c81f1c4370..42e8ab2bce 100644 --- a/include/asm-arm/arch-omap24xx/mem.h +++ b/include/asm-arm/arch-omap24xx/mem.h @@ -103,7 +103,7 @@ typedef enum { /* GPMC settings */ #ifdef PRCM_CONFIG_II /* L3 at 100MHz */ -# ifdef CFG_NAND_BOOT +# ifdef CONFIG_SYS_NAND_BOOT # define H4_24XX_GPMC_CONFIG1_0 0x0 # define H4_24XX_GPMC_CONFIG2_0 0x00141400 # define H4_24XX_GPMC_CONFIG3_0 0x00141400 @@ -116,7 +116,7 @@ typedef enum { # define H4_24XX_GPMC_CONFIG3_0 0x00050502 # define H4_24XX_GPMC_CONFIG4_0 0x0C060C06 # define H4_24XX_GPMC_CONFIG5_0 0x01131F1F -# endif /* endif CFG_NAND_BOOT */ +# endif /* endif CONFIG_SYS_NAND_BOOT */ # define H4_24XX_GPMC_CONFIG7_0 (0x00000C40|(H4_CS0_BASE >> 24)) # define H4_24XX_GPMC_CONFIG1_1 0x00011000 # define H4_24XX_GPMC_CONFIG2_1 0x001F1F00 @@ -128,7 +128,7 @@ typedef enum { #endif /* endif PRCM_CONFIG_II */ #ifdef PRCM_CONFIG_III /* L3 at 133MHz */ -# ifdef CFG_NAND_BOOT +# ifdef CONFIG_SYS_NAND_BOOT # define H4_24XX_GPMC_CONFIG1_0 0x0 # define H4_24XX_GPMC_CONFIG2_0 0x00141400 # define H4_24XX_GPMC_CONFIG3_0 0x00141400 @@ -142,7 +142,7 @@ typedef enum { # define H4_24XX_GPMC_CONFIG4_0 0x10081008 # define H4_24XX_GPMC_CONFIG5_0 0x01131F1F # define H4_24XX_GPMC_CONFIG6_0 0x000004c4 -# endif /* endif CFG_NAND_BOOT */ +# endif /* endif CONFIG_SYS_NAND_BOOT */ # define H4_24XX_GPMC_CONFIG7_0 (0x00000C40|(H4_CS0_BASE >> 24)) # define H4_24XX_GPMC_CONFIG1_1 0x00011000 # define H4_24XX_GPMC_CONFIG2_1 0x001f1f01 @@ -151,6 +151,6 @@ typedef enum { # define H4_24XX_GPMC_CONFIG5_1 0x041f1F1F # define H4_24XX_GPMC_CONFIG6_1 0x000004C4 # define H4_24XX_GPMC_CONFIG7_1 (0x00000F40|(H4_CS1_BASE >> 24)) -#endif /* endif CFG_PRCM_III */ +#endif /* endif CONFIG_SYS_PRCM_III */ #endif /* endif _OMAP24XX_MEM_H_ */ diff --git a/include/asm-arm/global_data.h b/include/asm-arm/global_data.h index f419b42adc..5c56ce3282 100644 --- a/include/asm-arm/global_data.h +++ b/include/asm-arm/global_data.h @@ -30,7 +30,7 @@ * global variables during system initialization (until we have set * up the memory controller so that we can use RAM). * - * Keep it *SMALL* and remember to set CFG_GBL_DATA_SIZE > sizeof(gd_t) + * Keep it *SMALL* and remember to set CONFIG_SYS_GBL_DATA_SIZE > sizeof(gd_t) */ typedef struct global_data { |