diff options
author | wdenk <wdenk> | 2003-05-31 18:35:21 +0000 |
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committer | wdenk <wdenk> | 2003-05-31 18:35:21 +0000 |
commit | 7a8e9bed17d7924a9c5c4699b1f6a3a0359524ed (patch) | |
tree | 5c273df9c5efa7b1b6a4ca88904e48039ef591e8 /include/asm-i386 | |
parent | 3b57fe0a70b903f4db66c558bb9828bc58acf06b (diff) |
* Patch by Marc Singer, 29 May 2003:
Fixed rarp boot method for IA32 and other little-endian CPUs.
* Patch by Marc Singer, 28 May 2003:
Added port I/O commands.
* Patch by Matthew McClintock, 28 May 2003
- cpu/mpc824x/start.S: fix relocation code when booting from RAM
- minor patches for utx8245
* Patch by Daniel Engström, 28 May 2003:
x86 update
* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
add nand flash support to SXNI855T configuration
fix/extend nand flash support:
- fix 'nand erase' command so does not erase bad blocks
- fix 'nand write' command so does not write to bad blocks
- fix nand_probe() so handles no flash detected properly
- add doc/README.nand
- add .jffs2 and .oob options to nand read/write
- add 'nand bad' command to list bad blocks
- add 'clean' option to 'nand erase' to write JFFS2 clean markers
- make NAND read/write faster
* Patch by Rune Torgersen, 23 May 2003:
Update for MPC8266ADS board
Diffstat (limited to 'include/asm-i386')
-rw-r--r-- | include/asm-i386/bitops.h | 1 | ||||
-rw-r--r-- | include/asm-i386/byteorder.h | 4 | ||||
-rw-r--r-- | include/asm-i386/ic/sc520.h | 79 | ||||
-rw-r--r-- | include/asm-i386/io.h | 2 | ||||
-rw-r--r-- | include/asm-i386/pci.h | 6 | ||||
-rw-r--r-- | include/asm-i386/realmode.h | 1 | ||||
-rw-r--r-- | include/asm-i386/u-boot-i386.h | 11 | ||||
-rw-r--r-- | include/asm-i386/u-boot.h | 3 |
8 files changed, 92 insertions, 15 deletions
diff --git a/include/asm-i386/bitops.h b/include/asm-i386/bitops.h index a3063cacc9..7d29335fde 100644 --- a/include/asm-i386/bitops.h +++ b/include/asm-i386/bitops.h @@ -5,7 +5,6 @@ * Copyright 1992, Linus Torvalds. */ -#include <linux/config.h> /* * These have to be done with inline assembly: that way the bit-setting diff --git a/include/asm-i386/byteorder.h b/include/asm-i386/byteorder.h index bbfb629fae..a9c69d5b1f 100644 --- a/include/asm-i386/byteorder.h +++ b/include/asm-i386/byteorder.h @@ -5,10 +5,6 @@ #ifdef __GNUC__ -/* For avoiding bswap on i386 */ -#ifdef __KERNEL__ -#include <linux/config.h> -#endif static __inline__ __const__ __u32 ___arch__swab32(__u32 x) { diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h index 9708504e31..1836f99a6d 100644 --- a/include/asm-i386/ic/sc520.h +++ b/include/asm-i386/ic/sc520.h @@ -116,6 +116,11 @@ #define SC520_UART2CTL 0x0cc4 /* UART 2 General Control Register */ #define SC520_UART2STA 0x0cc5 /* UART 2 General Status Register */ #define SC520_UART2FCRSHAD 0x0cc6 /* UART 2 FIFO Control Shadow Register */ +#define SC520_SSICTL 0x0cd0 /* SSI Control */ +#define SC520_SSIXMIT 0x0cd1 /* SSI Transmit */ +#define SC520_SSICMD 0x0cd2 /* SSI Command */ +#define SC520_SSISTA 0x0cd3 /* SSI Status */ +#define SC520_SSIRCV 0x0cd4 /* SSI Receive */ #define SC520_PICICR 0x0d00 /* Interrupt Control Register */ #define SC520_MPICMODE 0x0d02 /* Master PIC Interrupt Mode Register */ #define SC520_SL1PICMODE 0x0d03 /* Slave 1 PIC Interrupt Mode Register */ @@ -195,9 +200,31 @@ /* MMCR Register bits (not all of them :) ) */ +/* SSI Stuff */ +#define CTL_CLK_SEL_4 0x00 /* Nominal Bit Rate = 8 MHz */ +#define CTL_CLK_SEL_8 0x10 /* Nominal Bit Rate = 4 MHz */ +#define CTL_CLK_SEL_16 0x20 /* Nominal Bit Rate = 2 MHz */ +#define CTL_CLK_SEL_32 0x30 /* Nominal Bit Rate = 1 MHz */ +#define CTL_CLK_SEL_64 0x40 /* Nominal Bit Rate = 512 KHz */ +#define CTL_CLK_SEL_128 0x50 /* Nominal Bit Rate = 256 KHz */ +#define CTL_CLK_SEL_256 0x60 /* Nominal Bit Rate = 128 KHz */ +#define CTL_CLK_SEL_512 0x70 /* Nominal Bit Rate = 64 KHz */ + +#define TC_INT_ENB 0x08 /* Transaction Complete Interrupt Enable */ +#define PHS_INV_ENB 0x04 /* SSI Inverted Phase Mode Enable */ +#define CLK_INV_ENB 0x02 /* SSI Inverted Clock Mode Enable */ +#define MSBF_ENB 0x01 /* SSI Most Significant Bit First Mode Enable */ + +#define SSICMD_CMD_SEL_XMITRCV 0x03 /* Simultaneous Transmit / Receive Transaction */ +#define SSICMD_CMD_SEL_RCV 0x02 /* Receive Transaction */ +#define SSICMD_CMD_SEL_XMIT 0x01 /* Transmit Transaction */ +#define SSISTA_BSY 0x02 /* SSI Busy */ +#define SSISTA_TC_INT 0x01 /* SSI Transaction Complete Interrupt */ + + /* BITS for SC520_ADDDECCTL: */ #define WPV_INT_ENB 0x80 /* Write-Protect Violation Interrupt Enable */ -#define IO_HOLE_DEST 0x10 /* I/O Hole Access Destination */ +#define IO_HOLE_DEST_PCI 0x10 /* I/O Hole Access Destination */ #define RTC_DIS 0x04 /* RTC Disable */ #define UART2_DIS 0x02 /* UART2 Disable */ #define UART1_DIS 0x01 /* UART1 Disable */ @@ -215,25 +242,64 @@ #define SC520_ISA_IO_BUS 0x00000000 #define SC520_ISA_IO_SIZE 0x00001000 -/* PCI I/O space from 0x1000 to 0xfdff */ +/* PCI I/O space from 0x1000 to 0xdfff + * (make 0xe000-0xfdff available for stuff like PCCard boot) */ #define SC520_PCI_IO_PHYS 0x00001000 #define SC520_PCI_IO_BUS 0x00001000 -#define SC520_PCI_IO_SIZE 0x0000ee00 +#define SC520_PCI_IO_SIZE 0x0000d000 /* system memory from 0x00000000 to 0x0fffffff */ #define SC520_PCI_MEMORY_PHYS 0x00000000 #define SC520_PCI_MEMORY_BUS 0x00000000 #define SC520_PCI_MEMORY_SIZE 0x10000000 -/* PCI bus memory from 0x10000000 to 0x27ffffff */ +/* PCI bus memory from 0x10000000 to 0x26ffffff + * (make 0x27000000 - 0x27ffffff available for stuff like PCCard boot) */ #define SC520_PCI_MEM_PHYS 0x10000000 #define SC520_PCI_MEM_BUS 0x10000000 -#define SC520_PCI_MEM_SIZE 0x18000000 +#define SC520_PCI_MEM_SIZE 0x17000000 /* 0x28000000 - 0x3fffffff is used by the flash banks */ /* 0x40000000 - 0xffffffff is not adressable by the SC520 */ +/* priority numbers used for interrupt channel mappings */ +#define SC520_IRQ_DISABLED 0 +#define SC520_IRQ0 1 +#define SC520_IRQ1 2 +#define SC520_IRQ2 4 /* same as IRQ9 */ +#define SC520_IRQ3 11 +#define SC520_IRQ4 12 +#define SC520_IRQ5 13 +#define SC520_IRQ6 21 +#define SC520_IRQ7 22 +#define SC520_IRQ8 3 +#define SC520_IRQ9 4 +#define SC520_IRQ10 5 +#define SC520_IRQ11 6 +#define SC520_IRQ12 7 +#define SC520_IRQ13 8 +#define SC520_IRQ14 9 +#define SC520_IRQ15 10 + + +/* pin number used for PCI interrupt mappings */ +#define SC520_PCI_INTA 0 +#define SC520_PCI_INTB 1 +#define SC520_PCI_INTC 2 +#define SC520_PCI_INTD 3 +#define SC520_PCI_GPIRQ0 4 +#define SC520_PCI_GPIRQ1 5 +#define SC520_PCI_GPIRQ2 6 +#define SC520_PCI_GPIRQ3 7 +#define SC520_PCI_GPIRQ4 8 +#define SC520_PCI_GPIRQ5 9 +#define SC520_PCI_GPIRQ6 10 +#define SC520_PCI_GPIRQ7 11 +#define SC520_PCI_GPIRQ8 12 +#define SC520_PCI_GPIRQ9 13 +#define SC520_PCI_GPIRQ10 14 + /* utility functions */ void write_mmcr_byte(u16 mmcr, u8 data); void write_mmcr_word(u16 mmcr, u16 data); @@ -242,8 +308,11 @@ u8 read_mmcr_byte(u16 mmcr); u16 read_mmcr_word(u16 mmcr); u32 read_mmcr_long(u16 mmcr); +extern int sc520_pci_ints[]; + void init_sc520(void); unsigned long init_sc520_dram(void); void pci_sc520_init(struct pci_controller *hose); +int pci_sc520_set_irq(int pci_pin, int irq); #endif diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h index d8c503ccb3..d17d45e918 100644 --- a/include/asm-i386/io.h +++ b/include/asm-i386/io.h @@ -1,8 +1,6 @@ #ifndef _ASM_IO_H #define _ASM_IO_H -#include <linux/config.h> - /* * This file contains the definitions for the x86 IO instructions * inb/inw/inl/outb/outw/outl and the "string versions" of the same diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h index 15c165b720..3a91f57cf4 100644 --- a/include/asm-i386/pci.h +++ b/include/asm-i386/pci.h @@ -27,5 +27,11 @@ #define _PCI_I386_H_ 1 void pci_setup_type1(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data); +int pci_enable_legacy_video_ports(struct pci_controller* hose); +int pci_shadow_rom(pci_dev_t dev, unsigned char *dest); +void pci_remove_rom_window(struct pci_controller* hose, u32 addr); +u32 pci_get_rom_window(struct pci_controller* hose, int size); + + #endif diff --git a/include/asm-i386/realmode.h b/include/asm-i386/realmode.h index fcb76c336a..a84f128173 100644 --- a/include/asm-i386/realmode.h +++ b/include/asm-i386/realmode.h @@ -27,5 +27,6 @@ int bios_setup(void); int enter_realmode(u16 seg, u16 off, struct pt_regs *in, struct pt_regs *out); +int enter_realmode_int(u8 lvl, struct pt_regs *in, struct pt_regs *out); #endif diff --git a/include/asm-i386/u-boot-i386.h b/include/asm-i386/u-boot-i386.h index 6e5e059592..12d10a78a0 100644 --- a/include/asm-i386/u-boot-i386.h +++ b/include/asm-i386/u-boot-i386.h @@ -46,8 +46,15 @@ int cpu_init(void); int timer_init(void); /* board/.../... */ -int board_init(void); -int dram_init (void); +int board_init(void); +int dram_init(void); + +void isa_unmap_rom(u32 addr); +u32 isa_map_rom(u32 bus_addr, int size); + +/* lib_i386/... */ +int video_bios_init(void); +int video_init(void); #endif /* _U_BOOT_I386_H_ */ diff --git a/include/asm-i386/u-boot.h b/include/asm-i386/u-boot.h index 554bc85ea9..dc5dd727c9 100644 --- a/include/asm-i386/u-boot.h +++ b/include/asm-i386/u-boot.h @@ -43,7 +43,8 @@ typedef struct bd_info { unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ - unsigned long bi_baudrate; /* Console Baudrate */ + unsigned int bi_baudrate; /* Console Baudrate */ + unsigned long bi_boot_params; /* where this board expects params */ struct environment_s *bi_env; struct /* RAM configuration */ { |