summaryrefslogtreecommitdiff
path: root/include/asm-m68k/m547x_8x.h
diff options
context:
space:
mode:
authorTsiChung Liew <Tsi-Chung.Liew@freescale.com>2008-10-21 10:03:07 +0000
committerJohn Rigby <jrigby@freescale.com>2008-11-03 09:45:58 -0700
commit012522fef3b382469125beb46a315ab4dee02fb0 (patch)
tree9bc6b0cc47ec08dd3efb07a75eaa50fd04ec5f32 /include/asm-m68k/m547x_8x.h
parentac2331aee99ad36be0fcfed8c49922e3c61b576d (diff)
ColdFire: Modules header files cleanup
Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG, MDHA, SKHA, INTC, and FlexBus structures and definitions in immap_5xxx.h to more unify modules header files. Append DSPI support for m547x_8x. SSI cleanup. Remove USB Host structure from immap_539.h. Apply changes to use FlexBus structures in mcf52x2's cpu_init.c and platform configuration files. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'include/asm-m68k/m547x_8x.h')
-rw-r--r--include/asm-m68k/m547x_8x.h68
1 files changed, 0 insertions, 68 deletions
diff --git a/include/asm-m68k/m547x_8x.h b/include/asm-m68k/m547x_8x.h
index 2db8df26f2..23cee8e5e4 100644
--- a/include/asm-m68k/m547x_8x.h
+++ b/include/asm-m68k/m547x_8x.h
@@ -305,74 +305,6 @@
#define INT0_HI_GPT1 (61)
#define INT0_HI_GPT0 (62)
-/* Bit definitions and macros for IPRH */
-#define INTC_IPRH_INT32 (0x00000001)
-#define INTC_IPRH_INT33 (0x00000002)
-#define INTC_IPRH_INT34 (0x00000004)
-#define INTC_IPRH_INT35 (0x00000008)
-#define INTC_IPRH_INT36 (0x00000010)
-#define INTC_IPRH_INT37 (0x00000020)
-#define INTC_IPRH_INT38 (0x00000040)
-#define INTC_IPRH_INT39 (0x00000080)
-#define INTC_IPRH_INT40 (0x00000100)
-#define INTC_IPRH_INT41 (0x00000200)
-#define INTC_IPRH_INT42 (0x00000400)
-#define INTC_IPRH_INT43 (0x00000800)
-#define INTC_IPRH_INT44 (0x00001000)
-#define INTC_IPRH_INT45 (0x00002000)
-#define INTC_IPRH_INT46 (0x00004000)
-#define INTC_IPRH_INT47 (0x00008000)
-#define INTC_IPRH_INT48 (0x00010000)
-#define INTC_IPRH_INT49 (0x00020000)
-#define INTC_IPRH_INT50 (0x00040000)
-#define INTC_IPRH_INT51 (0x00080000)
-#define INTC_IPRH_INT52 (0x00100000)
-#define INTC_IPRH_INT53 (0x00200000)
-#define INTC_IPRH_INT54 (0x00400000)
-#define INTC_IPRH_INT55 (0x00800000)
-#define INTC_IPRH_INT56 (0x01000000)
-#define INTC_IPRH_INT57 (0x02000000)
-#define INTC_IPRH_INT58 (0x04000000)
-#define INTC_IPRH_INT59 (0x08000000)
-#define INTC_IPRH_INT60 (0x10000000)
-#define INTC_IPRH_INT61 (0x20000000)
-#define INTC_IPRH_INT62 (0x40000000)
-#define INTC_IPRH_INT63 (0x80000000)
-
-/* Bit definitions and macros for IPRL */
-#define INTC_IPRL_INT0 (0x00000001)
-#define INTC_IPRL_INT1 (0x00000002)
-#define INTC_IPRL_INT2 (0x00000004)
-#define INTC_IPRL_INT3 (0x00000008)
-#define INTC_IPRL_INT4 (0x00000010)
-#define INTC_IPRL_INT5 (0x00000020)
-#define INTC_IPRL_INT6 (0x00000040)
-#define INTC_IPRL_INT7 (0x00000080)
-#define INTC_IPRL_INT8 (0x00000100)
-#define INTC_IPRL_INT9 (0x00000200)
-#define INTC_IPRL_INT10 (0x00000400)
-#define INTC_IPRL_INT11 (0x00000800)
-#define INTC_IPRL_INT12 (0x00001000)
-#define INTC_IPRL_INT13 (0x00002000)
-#define INTC_IPRL_INT14 (0x00004000)
-#define INTC_IPRL_INT15 (0x00008000)
-#define INTC_IPRL_INT16 (0x00010000)
-#define INTC_IPRL_INT17 (0x00020000)
-#define INTC_IPRL_INT18 (0x00040000)
-#define INTC_IPRL_INT19 (0x00080000)
-#define INTC_IPRL_INT20 (0x00100000)
-#define INTC_IPRL_INT21 (0x00200000)
-#define INTC_IPRL_INT22 (0x00400000)
-#define INTC_IPRL_INT23 (0x00800000)
-#define INTC_IPRL_INT24 (0x01000000)
-#define INTC_IPRL_INT25 (0x02000000)
-#define INTC_IPRL_INT26 (0x04000000)
-#define INTC_IPRL_INT27 (0x08000000)
-#define INTC_IPRL_INT28 (0x10000000)
-#define INTC_IPRL_INT29 (0x20000000)
-#define INTC_IPRL_INT30 (0x40000000)
-#define INTC_IPRL_INT31 (0x80000000)
-
/*********************************************************************
* General Purpose Timers (GPTMR)
*********************************************************************/