diff options
| author | Wolfgang Denk <wd@denx.de> | 2008-05-20 16:00:29 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-05-21 00:14:08 +0200 |
| commit | 53677ef18e25c97ac613349087c5cb33ae5a2741 (patch) | |
| tree | f947d34d6efaee2401ea0e4c6104ef2f6a0f7ad0 /include/asm-m68k | |
| parent | 727f63334676e760877d43bfb8f0e9331ac8b101 (diff) | |
Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/asm-m68k')
| -rw-r--r-- | include/asm-m68k/m5249.h | 2 | ||||
| -rw-r--r-- | include/asm-m68k/m5282.h | 18 |
2 files changed, 10 insertions, 10 deletions
diff --git a/include/asm-m68k/m5249.h b/include/asm-m68k/m5249.h index 5ed3cbc056..facf0c9090 100644 --- a/include/asm-m68k/m5249.h +++ b/include/asm-m68k/m5249.h @@ -58,7 +58,7 @@ #define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w) */ #define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */ #define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ -#define MCFSIM_MPARK 0x0c /* Bus master park register (r/w) */ +#define MCFSIM_MPARK 0x0c /* Bus master park register (r/w) */ #define MCFSIM_SIMR 0x00 /* SIM Config reg (r/w) */ #define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ diff --git a/include/asm-m68k/m5282.h b/include/asm-m68k/m5282.h index 7473bb9be6..f6a6b0408f 100644 --- a/include/asm-m68k/m5282.h +++ b/include/asm-m68k/m5282.h @@ -382,15 +382,15 @@ #define MCFCCM_CIR (*(vu_short *)(CFG_MBAR+0x0011000A)) /* Bit level definitions and macros */ -#define MCFCCM_CCR_LOAD (0x8000) -#define MCFCCM_CCR_MODE(x) (((x)&0x0007)<<8) -#define MCFCCM_CCR_SZEN (0x0040) -#define MCFCCM_CCR_PSTEN (0x0020) -#define MCFCCM_CCR_BME (0x0008) -#define MCFCCM_CCR_BMT(x) (((x)&0x0007)) +#define MCFCCM_CCR_LOAD (0x8000) +#define MCFCCM_CCR_MODE(x) (((x)&0x0007)<<8) +#define MCFCCM_CCR_SZEN (0x0040) +#define MCFCCM_CCR_PSTEN (0x0020) +#define MCFCCM_CCR_BME (0x0008) +#define MCFCCM_CCR_BMT(x) (((x)&0x0007)) -#define MCFCCM_CIR_PIN_MASK (0xFF00) -#define MCFCCM_CIR_PRN_MASK (0x00FF) +#define MCFCCM_CIR_PIN_MASK (0xFF00) +#define MCFCCM_CIR_PRN_MASK (0x00FF) /* Clock Module */ @@ -554,7 +554,7 @@ #define MCFGPT_GPTIE_C1I (0x02) #define MCFGPT_GPTIE_C0I (0x01) -#define MCFGPT_GPTSCR2_TOI (0x80) +#define MCFGPT_GPTSCR2_TOI (0x80) #define MCFGPT_GPTSCR2_PUPT (0x20) #define MCFGPT_GPTSCR2_RDPT (0x10) #define MCFGPT_GPTSCR2_TCRE (0x08) |