diff options
| author | wdenk <wdenk> | 2003-02-28 00:49:47 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2003-02-28 00:49:47 +0000 |
| commit | 6069ff265362ef6239749b5f598b137f407b821e (patch) | |
| tree | 991432052f2aa7da45d8c1d51db9f80478d7e75d /include/asm-mips/cachectl.h | |
| parent | 2a9e02ead3024f33658f1f4110834d0601dd6b2f (diff) | |
* Add support for 16 MB flash configuration of TRAB board
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS
* Add image information to README
* Fix dual PCMCIA slot support (when running with just one
slot populated)
* Add VFD type detection to trab board
* extend drivers/cs8900.c driver to synchronize ethaddr environment
variable with value in the EEPROM
* Start adding MIPS support files
Diffstat (limited to 'include/asm-mips/cachectl.h')
| -rw-r--r-- | include/asm-mips/cachectl.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/include/asm-mips/cachectl.h b/include/asm-mips/cachectl.h new file mode 100644 index 0000000000..9cc2b87215 --- /dev/null +++ b/include/asm-mips/cachectl.h @@ -0,0 +1,24 @@ +/* + * cachectl.h -- defines for MIPS cache control system calls + * + * Copyright (C) 1994, 1995, 1996 by Ralf Baechle + */ +#ifndef __ASM_MIPS_CACHECTL +#define __ASM_MIPS_CACHECTL + +/* + * Options for cacheflush system call + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* __ASM_MIPS_CACHECTL */ |