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author | Wolfgang Denk <wd@denx.de> | 2009-04-01 22:43:51 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-04-01 22:43:51 +0200 |
commit | da72af8d727e74093e5fcb3e8599eb8d0df7a749 (patch) | |
tree | 8937781ff72c3841e2352863e3060f0b1a1808ed /include/asm-ppc/fsl_lbc.h | |
parent | c2eb8be7f760a2efe30a495bfb10857838dcf3fa (diff) | |
parent | fc39c2fd51e64707de4d61ed49479ebea2847e1b (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'include/asm-ppc/fsl_lbc.h')
-rw-r--r-- | include/asm-ppc/fsl_lbc.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index 9fa0b65949..bc1ebe6e31 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -397,6 +397,33 @@ #define FPAR_LP_CI 0x000007FF #define FPAR_LP_CI_SHIFT 0 +/* LSDMR - SDRAM Machine Mode Register + */ +#define LSDMR_RFEN (1 << (31 - 1)) +#define LSDMR_BSMA1516 (3 << (31 - 10)) +#define LSDMR_BSMA1617 (4 << (31 - 10)) +#define LSDMR_RFCR5 (3 << (31 - 16)) +#define LSDMR_RFCR16 (7 << (31 - 16)) +#define LSDMR_PRETOACT3 (3 << (31 - 19)) +#define LSDMR_PRETOACT7 (7 << (31 - 19)) +#define LSDMR_ACTTORW3 (3 << (31 - 22)) +#define LSDMR_ACTTORW7 (7 << (31 - 22)) +#define LSDMR_ACTTORW6 (6 << (31 - 22)) +#define LSDMR_BL8 (1 << (31 - 23)) +#define LSDMR_WRC2 (2 << (31 - 27)) +#define LSDMR_WRC4 (0 << (31 - 27)) +#define LSDMR_BUFCMD (1 << (31 - 29)) +#define LSDMR_CL3 (3 << (31 - 31)) + +#define LSDMR_OP_NORMAL (0 << (31 - 4)) +#define LSDMR_OP_ARFRSH (1 << (31 - 4)) +#define LSDMR_OP_SRFRSH (2 << (31 - 4)) +#define LSDMR_OP_MRW (3 << (31 - 4)) +#define LSDMR_OP_PRECH (4 << (31 - 4)) +#define LSDMR_OP_PCHALL (5 << (31 - 4)) +#define LSDMR_OP_ACTBNK (6 << (31 - 4)) +#define LSDMR_OP_RWINV (7 << (31 - 4)) + /* LTESR - Transfer Error Status Register */ #define LTESR_BM 0x80000000 |