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authorMinkyu Kang <mk7.kang@samsung.com>2009-11-10 08:44:30 +0900
committerMinkyu Kang <mk7.kang@samsung.com>2009-11-10 08:44:30 +0900
commitb6d8992cbbe5f04c11f7e6e09c09ae1a031d8720 (patch)
tree38d607f78f33bcd41d8da448f4da7d5c220b4f93 /include/asm-ppc
parentf9000d975b5f2550defd5fe5b57392a72fc77201 (diff)
parentb91b8f74fe9ded18344c3d03080a4abc07254502 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/config.h10
-rw-r--r--include/asm-ppc/fsl_pci.h3
-rw-r--r--include/asm-ppc/immap_512x.h4
3 files changed, 14 insertions, 3 deletions
diff --git a/include/asm-ppc/config.h b/include/asm-ppc/config.h
index eba79010b1..af0853b0d7 100644
--- a/include/asm-ppc/config.h
+++ b/include/asm-ppc/config.h
@@ -47,6 +47,16 @@
#define CONFIG_MAX_CPUS 1
#endif
+/*
+ * Provide a default boot page translation virtual address that lines up with
+ * Freescale's default e500 reset page.
+ */
+#if (defined(CONFIG_E500) && defined(CONFIG_MP))
+#ifndef CONFIG_BPTR_VIRT_ADDR
+#define CONFIG_BPTR_VIRT_ADDR 0xfffff000
+#endif
+#endif
+
/* Relocation to SDRAM works on all PPC boards */
#define CONFIG_RELOC_FIXUP_WORKS
diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h
index 2790da7ed1..6b0c89bd3f 100644
--- a/include/asm-ppc/fsl_pci.h
+++ b/include/asm-ppc/fsl_pci.h
@@ -62,6 +62,7 @@ typedef struct pci_inbound_window {
#define PIWAR_LOCAL 0x00f00000
#define PIWAR_READ_SNOOP 0x00050000
#define PIWAR_WRITE_SNOOP 0x00005000
+#define PIWAR_IWS_4K 0x0000000b
u32 res2[3];
} pit_t;
@@ -171,7 +172,7 @@ struct fsl_pci_info {
};
int fsl_pci_init_port(struct fsl_pci_info *pci_info,
- struct pci_controller *hose, int busno);
+ struct pci_controller *hose, int busno, int pcie_ep);
#define SET_STD_PCI_INFO(x, num) \
{ \
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index bdc6ff2845..95350fd9b8 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -215,8 +215,8 @@ typedef struct clk512x {
#define CLOCK_SCCR2_DIU_EN 0x80000000
#define CLOCK_SCCR2_AXE_EN 0x40000000
#define CLOCK_SCCR2_MEM_EN 0x20000000
-#define CLOCK_SCCR2_USB2_EN 0x10000000
-#define CLOCK_SCCR2_USB1_EN 0x08000000
+#define CLOCK_SCCR2_USB1_EN 0x10000000
+#define CLOCK_SCCR2_USB2_EN 0x08000000
#define CLOCK_SCCR2_I2C_EN 0x04000000
#define CLOCK_SCCR2_BDLC_EN 0x02000000
#define CLOCK_SCCR2_SDHC_EN 0x01000000