diff options
| author | Mario Six <mario.six@gdsys.cc> | 2019-01-21 09:18:03 +0100 |
|---|---|---|
| committer | Mario Six <mario.six@gdsys.cc> | 2019-05-21 07:52:33 +0200 |
| commit | fe7d654d04a4ba87813dcf8acb7a17373029770d (patch) | |
| tree | acff08e60a356274b602f42d44a975b7a279eca2 /include/configs/MPC8308RDB.h | |
| parent | daac2086ce1a36ffbd603eb643f45d14faae40e7 (diff) | |
mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to Kconfig
Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/MPC8308RDB.h')
| -rw-r--r-- | include/configs/MPC8308RDB.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 185f6490d7..cd78836bcd 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -175,9 +175,6 @@ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */ -/* FLASH */ -#define CONFIG_SYS_BR0_PRELIM (0xFE000000 | BR_PS_16 | BR_MS_GPCM | BR_V) -#define CONFIG_SYS_OR0_PRELIM (OR_AM_8MB | OR_UPM_XAM | OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ /* 127 64KB sectors and 8 8KB top sectors per device */ @@ -191,9 +188,6 @@ */ #define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ #define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024) /* 0x00008000 */ -/* NAND */ -#define CONFIG_SYS_BR1_PRELIM (0xE0600000 | BR_DECC_CHK_GEN | BR_PS_8 | BR_MS_FCM | BR_V) -#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_FCM_CSCT | OR_FCM_CST | OR_FCM_CHT | OR_FCM_SCY_1 | OR_FCM_TRLX | OR_FCM_EHTR) /* 0xFFFF8396 */ #ifdef CONFIG_VSC7385_ENET @@ -201,9 +195,6 @@ /* VSC7385 Base address on CS2 */ #define CONFIG_SYS_VSC7385_BASE 0xF0000000 #define CONFIG_SYS_VSC7385_SIZE (128 * 1024) /* 0x00020000 */ -/* VSC7385_BASE */ -#define CONFIG_SYS_BR2_PRELIM (0xF0000000 | BR_PS_8 | BR_MS_GPCM | BR_V) -#define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET) /* 0xFFFE09FF */ /* The flash address and size of the VSC7385 firmware image */ #define CONFIG_VSC7385_IMAGE 0xFE7FE000 |