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authorMario Six <mario.six@gdsys.cc>2019-01-21 09:18:17 +0100
committerMario Six <mario.six@gdsys.cc>2019-05-21 07:52:33 +0200
commit42c9a494f1659db6043f980d5f4fdee86fdf9dfb (patch)
treef4a50f87cb3901f0a26b09caa843b48795419c74 /include/configs/MPC8349EMDS_SDRAM.h
parent133ec602846d28a7915a7b3149d05d1c8a270873 (diff)
mpc83xx: Get rid of CONFIG_SYS_LBC_*
Except for one counter example, CONFIG_SYS_LBC_LBCR always has a value of either 0x00040000 or 0x00000000. CONFIG_SYS_LBC_MRTPR always has the value 0x20000000. CONFIG_SYS_LBC_LSDMR_{1,2,4,5} are not set for any mpc83xx board. CONFIG_SYS_LBC_LSRT is set by one board (to 0x32000000). To simplify the configuration files, hardcode the setting of these values for mpc83xx. Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/MPC8349EMDS_SDRAM.h')
-rw-r--r--include/configs/MPC8349EMDS_SDRAM.h8
1 files changed, 0 insertions, 8 deletions
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 1e0e297351..493f6df187 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -151,14 +151,6 @@
#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */
/*
- * Local Bus LCRR and LBCR regs
- * LCRR: DLL bypass, Clock divider is 4
- * External Local Bus rate is
- * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
- */
-#define CONFIG_SYS_LBC_LBCR 0x00000000
-
-/*
* The MPC834xEA MDS for 834xE rev3.1 may not be assembled SDRAM memory.
*/