diff options
| author | Timur Tabi <timur@freescale.com> | 2011-08-04 18:03:41 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-09-29 19:01:04 -0500 |
| commit | e46fedfeb214d118b9983d11fcc929ed49f5ccd7 (patch) | |
| tree | 082992bbcb09217952f6f758ef78d74460cc2458 /include/configs/MPC8569MDS.h | |
| parent | b6c3722dfa98a68236301ddf525dfaf90a95224f (diff) | |
powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
This is necessary for the assembly-language code that relocates CCSR, since
the assembler does not understand 64-bit constants.
CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
should not be defined in a board header file. Similarly,
CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
it should also not be defined in the board header file.
CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
and so CCSR will not be relocated.
Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
builds (e.g. NAND) are required to relocate CCSR only during the last stage
(i.e. the "real" U-Boot). All other stages should define
CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.
README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/MPC8569MDS.h')
| -rw-r--r-- | include/configs/MPC8569MDS.h | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index fa626bb977..dd7278c4b8 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -105,20 +105,11 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_L2_SIZE (512 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR 0xe0000000 /* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR - /* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR - /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR 0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR #if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) -#define CONFIG_SYS_CCSRBAR_DEFAULT CONFIG_SYS_CCSRBAR -#else -#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif /* DDR Setup */ |