diff options
| author | Tom Rini <trini@konsulko.com> | 2018-02-03 12:10:38 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-02-11 09:30:09 -0500 |
| commit | 278b90ce786f73faf29aa522d5d101e1da006378 (patch) | |
| tree | d2b04ec5de43d8d9cf23261f7f030bf84e0423a0 /include/configs/P1010RDB.h | |
| parent | 7c8f00e484658c673d32d8422c96cb64bb571063 (diff) | |
configs: Migrate CONFIG_SYS_TEXT_BASE
On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current
values into the defconfig and removing them from the headers.
I did not attempt to add more default values in and for now will leave
that to maintainers.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/P1010RDB.h')
| -rw-r--r-- | include/configs/P1010RDB.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 6a444aea61..78198059da 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -18,7 +18,6 @@ #define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xD0001000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) @@ -37,13 +36,11 @@ #ifdef CONFIG_SPIFLASH #ifdef CONFIG_SECURE_BOOT #define CONFIG_RAMBOOT_SPIFLASH -#define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xD0001000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) @@ -67,7 +64,6 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFFE000 #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 @@ -104,21 +100,15 @@ #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_TPL_PAD_TO 0x20000 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #endif #endif #ifdef CONFIG_NAND_SECBOOT /* NAND Boot */ #define CONFIG_RAMBOOT_NAND -#define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff40000 -#endif - #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif |