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| author | Kumar Gala <galak@kernel.crashing.org> | 2009-11-13 09:09:10 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-01-05 13:49:08 -0600 |
| commit | 783852e467f32a3a5568b542379e9fec3d26a173 (patch) | |
| tree | 6c9803f254ebdf5c97d021c1c97e7e0112d80338 /include/configs/P2020DS.h | |
| parent | 355f4f85e90ce2e6d91883012c2993be7970c8b1 (diff) | |
ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START
Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/P2020DS.h')
| -rw-r--r-- | include/configs/P2020DS.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index df9ab34e80..f4509bd090 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -101,7 +101,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000) /* DDR Setup */ -#define CONFIG_SYS_DDR_TLB_START 9 #define CONFIG_VERY_BIG_RAM #define CONFIG_FSL_DDR3 1 #undef CONFIG_FSL_DDR_INTERACTIVE |