diff options
| author | Wolfgang Denk <wd@pollux.denx.de> | 2005-08-05 20:03:38 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2005-08-05 20:03:38 +0200 |
| commit | b4f15fdaf77b7339e2984703c83269c7cdf680a9 (patch) | |
| tree | 32bb3b65d98a229aead643ae11ef2dc433146411 /include/configs/PM854.h | |
| parent | b20d00328c5486a4b2cdf07ce7afaf2139dc741e (diff) | |
| parent | 07a2505f67e091ff70506ae6a5022b416211df44 (diff) | |
Merge with /home/wd/git/u-boot/jon_loeliger
Diffstat (limited to 'include/configs/PM854.h')
| -rw-r--r-- | include/configs/PM854.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/include/configs/PM854.h b/include/configs/PM854.h index b3e1f5e98e..07e3f06ac1 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -45,10 +45,12 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE #undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup*/ -#define CONFIG_DDR_ECC /* only for ECC DDR module */ #define CONFIG_DDR_DLL /* possible DLL fix needed */ #define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */ +#define CONFIG_DDR_ECC /* only for ECC DDR module */ +#define CONFIG_MEM_INIT_VALUE 0xDeadBeef + /* * sysclk for MPC85xx @@ -256,17 +258,21 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MPC85XX_TSEC1 1 +#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0" #define CONFIG_MPC85XX_TSEC2 1 +#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1" #define TSEC1_PHY_ADDR 0 #define TSEC2_PHY_ADDR 1 #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 #define CONFIG_MPC85XX_FEC 1 +#define CONFIG_MPC85XX_FEC_NAME "FEC" #define FEC_PHY_ADDR 3 #define FEC_PHYIDX 0 -#define CONFIG_ETHPRIME "ENET0" +/* Options are: TSEC[0-1] */ +#define CONFIG_ETHPRIME "TSEC0" #define CONFIG_HAS_ETH1 1 #define CONFIG_HAS_ETH2 1 |