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authorstroese <stroese>2005-04-20 06:52:40 +0000
committerstroese <stroese>2005-04-20 06:52:40 +0000
commitfddae7b8117c06cbc52027f297f5a657a87c8279 (patch)
treeedae93d39d2565e155d2d8ccbf2003c7be7a0776 /include/configs/PMC405.h
parent5e5f9ed254e20b830fef5f42a52ac0bbdc92a57e (diff)
* Patch by Matthias Fuchs, 18 Apr 2005:
Make PCI target address spaces on PMC405 and CPCI405 boards configurable via environment variables
Diffstat (limited to 'include/configs/PMC405.h')
-rw-r--r--include/configs/PMC405.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index bf561ee6ea..d8d9632628 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -252,7 +252,7 @@
#define CFG_EBC_PB1CR FLASH1_BA | 0x9A000 /* BAS=0xFE0,BS=16MB,BU=R/W,BW=16bit*/
/* Memory Bank 2 (CAN0, 1, RTC) initialization */
-#define CFG_EBC_PB2AP 0x03000040 /* TWT=6,TH=0,CSN=0,OEN=0,WBN=0,WBF=0 */
+#define CFG_EBC_PB2AP 0x03000440 /* TWT=5,TH=2,CSN=0,OEN=0,WBN=0,WBF=0 */
#define CFG_EBC_PB2CR CAN_BA | 0x18000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
/* Memory Bank 3 (CompactFlash IDE, FPGA internal) initialization */