diff options
author | Wolfgang Denk <wd@denx.de> | 2010-08-12 23:08:05 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-08-12 23:08:05 +0200 |
commit | ae37a0704a8a27e47471f541a68b88370cd14aa8 (patch) | |
tree | e591e61ff80c3ea1961b37c96e3ad161c8a1f0af /include/configs/PMC440.h | |
parent | 18a056a18f6294a88c34105efcabf4c0638a946b (diff) | |
parent | dc41b8bf3df2b2c3bd833f871d88ff5ef40a19f3 (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-ti
Diffstat (limited to 'include/configs/PMC440.h')
-rw-r--r-- | include/configs/PMC440.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index c2fb56c6f9..3c19f52d9c 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -53,7 +53,7 @@ * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */ +#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 256 kB for malloc() */ #define CONFIG_PRAM 0 /* use pram variable to overwrite */ @@ -61,7 +61,7 @@ #define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE #define CONFIG_SYS_NAND_ADDR 0xd0000000 /* NAND Flash */ #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE @@ -301,8 +301,8 @@ "fdt_addr_r=800000\0" \ "fpga=fpga loadb 0 ${fpga_addr}\0" \ "load=tftp 200000 /tftpboot/pmc440/u-boot.bin\0" \ - "update=protect off fffa0000 ffffffff;era fffa0000 ffffffff;" \ - "cp.b 200000 fffa0000 60000\0" \ + "update=protect off fff90000 ffffffff;era fff90000 ffffffff;" \ + "cp.b 200000 fff90000 70000\0" \ "" #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ |