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| author | Priyanka Jain <Priyanka.Jain@freescale.com> | 2014-01-03 11:24:55 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-01-21 13:35:20 -0800 |
| commit | 2eb3ac7fe8ee29b2edfd7e0309115c2fc6875f95 (patch) | |
| tree | 1a174ed13fc1cb7972bf6f1c7a33de339ce86791 /include/configs/T1040RDB.h | |
| parent | b44bd2c73c4cfb6e3b9e7f8cf987e8e39aa74a0b (diff) | |
powerpc/t1040qds: Update DDR initialization related settings
Update following DDR related settings for T1040QDS
-Correct number of chip selects to two as t1040qds supports
two Chip selects.
-Update board_specific_parameters udimm structure with settings
derived via calibration.
-Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
read at 400KHz.
Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and
1600MT/s.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs/T1040RDB.h')
0 files changed, 0 insertions, 0 deletions