diff options
| author | Mario Six <mario.six@gdsys.cc> | 2019-01-21 09:18:14 +0100 |
|---|---|---|
| committer | Mario Six <mario.six@gdsys.cc> | 2019-05-21 07:52:33 +0200 |
| commit | 7c2e535770f56f5788e3771b9ee2dbf40ec4d93f (patch) | |
| tree | 4c6e27ee8f65f9ee14922bee82d59c8e097a0ccf /include/configs/TQM834x.h | |
| parent | e35012e802de17c60cb38d0201ca4f1afb071d4c (diff) | |
mpc83xx: Migrate CONFIG_LCRR_* to Kconfig
Migrate the CONFIG_LCRR_* settings to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/TQM834x.h')
| -rw-r--r-- | include/configs/TQM834x.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index d713c695f7..8171f8531b 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -16,18 +16,6 @@ */ #define CONFIG_E300 1 /* E300 Family */ -/* - * Local Bus LCRR - * LCRR: DLL bypass, Clock divider is 8 - * - * for CSB = 266 MHz it gives LCB clock frequency = 33 MHz - * - * External Local Bus rate is - * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV - */ -#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP -#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8 - /* board pre init: do not call, nothing to do */ /* detect the number of flash banks */ |