diff options
author | wdenk <wdenk> | 2003-07-07 20:07:54 +0000 |
---|---|---|
committer | wdenk <wdenk> | 2003-07-07 20:07:54 +0000 |
commit | f12e568ca45f6c56b5a6d52a43524987e141abe7 (patch) | |
tree | e0c4c1dc83553fa1ac900d2819a605372c1430d1 /include/configs/TQM860L.h | |
parent | 0d4983930a3559be92452761cfa268ee9d0f2773 (diff) |
* Add support for NSCU board
* Add support for TQM823M, TQM850M, TQM855M and TQM860M modules
* Add support for Am29LV160ML, Am29LV320ML, and Am29LV640ML
mirror bit flash on TQM8xxM modules
Diffstat (limited to 'include/configs/TQM860L.h')
-rw-r--r-- | include/configs/TQM860L.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index c386d3c325..598ad6afd7 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000, 2001, 2002 + * (C) Copyright 2000-2003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -254,7 +254,7 @@ #ifdef CONFIG_80MHz /* for 80 MHz, we use a 16 MHz clock * 5 */ #define CFG_PLPRCR \ ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST ) -#else /* up to 50 MHz we use a 1:1 clock */ +#else /* up to 66 MHz we use a 1:1 clock */ #define CFG_PLPRCR (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST) #endif /* CONFIG_80MHz */ @@ -270,7 +270,7 @@ SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \ SCCR_DFALCD00) -#else /* up to 50 MHz we use a 1:1 clock */ +#else /* up to 66 MHz we use a 1:1 clock */ #define CFG_SCCR (SCCR_TBS | \ SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \ |