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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-05-23 11:52:44 +0800 |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-06-20 10:44:09 +0530 |
| commit | 2b12f6cfe6239d8b6b8c5e7b0c5b5851f7bc489a (patch) | |
| tree | 6d0ebb01974bb833c5a5be3f379919e7256259f1 /include/configs/UCP1020.h | |
| parent | c16dfd016afb92771d425ae84a2949da1d7e112b (diff) | |
powerpc: mpc85xx: Move CONFIG_FSL_PCIE_RESET to Kconfig
Use the Kconfig option to select the PCIe reset errata.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'include/configs/UCP1020.h')
| -rw-r--r-- | include/configs/UCP1020.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index b518c222d4..b8040bb4d9 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -17,7 +17,6 @@ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #if defined(CONFIG_TARTGET_UCP1020T1) |