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authorRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>2020-07-15 22:48:55 +0530
committerTom Rini <trini@konsulko.com>2020-07-29 10:13:40 -0400
commit291635aecf84442876030972fd05b767e738f6fb (patch)
tree3ae6c0cba7b37489a1ef4e63fc149d6cc26e2137 /include/configs/bcm_ns3.h
parent423e08cb77015beab6a81595765ec1faa34bedde (diff)
board: ns3: add support for Broadcom Northstar 3
Add support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/bcm_ns3.h')
-rw-r--r--include/configs/bcm_ns3.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
new file mode 100644
index 0000000000..02a736456a
--- /dev/null
+++ b/include/configs/bcm_ns3.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#ifndef __BCM_NS3_H
+#define __BCM_NS3_H
+
+#include <linux/sizes.h>
+
+#define CONFIG_HOSTNAME "NS3"
+
+/* Physical Memory Map */
+#define V2M_BASE 0x80000000
+#define PHYS_SDRAM_1 V2M_BASE
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x80000)
+
+/*
+ * Initial SP before reloaction is placed at end of first DRAM bank,
+ * which is 0x1_0000_0000.
+ * Just before re-loaction, new SP is updated and re-location happens.
+ * So pointing the initial SP to end of 2GB DDR is not a problem
+ */
+#define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + 0x80000000)
+/* 12MB Malloc size */
+#define CONFIG_SYS_MALLOC_LEN (SZ_8M + SZ_4M)
+
+/* console configuration */
+#define CONFIG_SYS_NS16550_CLK 25000000
+
+#define CONFIG_SYS_CBSIZE SZ_1K
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 64
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#endif /* __BCM_NS3_H */