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authorWolfgang Denk <wd@denx.de>2007-08-13 21:57:53 +0200
committerWolfgang Denk <wd@denx.de>2007-08-13 21:57:53 +0200
commitbe5d72d10d47609326226225181e301fb9a33b58 (patch)
treed6f6537c7ca10a5a539ad32c4c158760107237ec /include/configs/cm5200.h
parenta08458303e7f9db67f296980036d3292c35cb45c (diff)
Minor coding style cleanup. Update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/cm5200.h')
-rw-r--r--include/configs/cm5200.h21
1 files changed, 1 insertions, 20 deletions
diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
index 56c0ecb4d9..d554348021 100644
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@@ -31,7 +31,6 @@
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_CM5200 1 /* ... on CM5200 platform */
-
/*
* Supported commands
*/
@@ -60,7 +59,6 @@
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SILENT_CONSOLE 1 /* needed to silence i2c_init() */
-
/*
* Ethernet configuration
*/
@@ -71,7 +69,6 @@
#define CONFIG_MISC_INIT_R 1
#define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
-
/*
* POST support
*/
@@ -80,11 +77,9 @@
/* List of I2C addresses to be verified by POST */
#define I2C_ADDR_LIST { CFG_I2C_SLAVE, CFG_I2C_IO, CFG_I2C_EEPROM }
-
/* display image timestamps */
#define CONFIG_TIMESTAMP 1
-
/*
* Autobooting
*/
@@ -137,19 +132,16 @@
""
#define CONFIG_BOOTCOMMAND "run flash_flash"
-
/*
* Low level configuration
*/
-
/*
* Clock configuration
*/
#define CFG_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
#define CFG_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
-
/*
* Memory map
*/
@@ -184,7 +176,7 @@
*/
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1
-#define CFG_FLASH_BASE 0xfc000000
+#define CFG_FLASH_BASE 0xfc000000
/* we need these despite using CFI */
#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */
#define CFG_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
@@ -215,7 +207,6 @@
#define CFG_CS_BURST 0x00000000
#define CFG_CS_DEADCYCLE 0x00000001
-
/*
* SDRAM configuration
* settings for k4s561632E-xx75, assuming XLB = 132 MHz
@@ -225,8 +216,6 @@
#define SDRAM_CONFIG1 0xE2333900
#define SDRAM_CONFIG2 0x8EE70000
-
-
/*
* MTD configuration
*/
@@ -238,7 +227,6 @@
"2m(kernel),27904k(rootfs)," \
"-(config)"
-
/*
* I2C configuration
*/
@@ -249,13 +237,11 @@
#define CFG_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
#define CFG_I2C_EEPROM 0x53 /* I2C EEPROM device address */
-
/*
* RTC configuration
*/
#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
-
/*
* USB configuration
*/
@@ -284,7 +270,6 @@
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
-
/*
* Pin multiplexing configuration
*/
@@ -302,7 +287,6 @@
*/
#define CFG_GPS_PORT_CONFIG 0x10559C44
-
/*
* Miscellaneous configurable options
*/
@@ -322,7 +306,6 @@
#define CFG_LOAD_ADDR 0x100000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Various low-level settings
*/
@@ -334,7 +317,6 @@
#define CFG_XLB_PIPELINING 1 /* enable transaction pipeling */
-
/*
* Cache Configuration
*/
@@ -343,7 +325,6 @@
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
/*
* Flat Device Tree support
*/