diff options
author | Tom Rini <trini@konsulko.com> | 2019-10-09 09:35:43 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2019-10-09 11:44:45 -0400 |
commit | eaa0bde05186b1738d221bc5effc6f257a14e360 (patch) | |
tree | 4e3c589df0fcd55fb38587ff708f6cd4a0d3863b /include/configs/display5.h | |
parent | 8c05abad1367e33908ee43c590801e338967838d (diff) | |
parent | 9fb50c68daa696056c7842989e5f7fae1d326b34 (diff) |
Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20191009
-------------------
Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532
- MX6UL / ULZ
- Toradex board
- Allow to set OCRAM for MX6Q/D
- MX7ULP
- MX8: (container image, imx8mq_mek), SCU API
- fix several board booting from SD/EMMC (cubox-i for example)
- pico boards
[trini: display5 merged manually]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/display5.h')
-rw-r--r-- | include/configs/display5.h | 28 |
1 files changed, 10 insertions, 18 deletions
diff --git a/include/configs/display5.h b/include/configs/display5.h index 182399a390..d80641568e 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -35,8 +35,11 @@ * 0x1540000 - 0x1640000 : SPI.factory (1MiB) */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SPI_FLASH_MTD +/* SPI Flash Configs */ +#if defined(CONFIG_SPL_BUILD) +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#undef CONFIG_SPI_FLASH_MTD #endif /* Below values are "dummy" - only to avoid build break */ @@ -57,23 +60,7 @@ #define CONFIG_MXC_UART_BASE UART5_BASE /* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 -#define CONFIG_SYS_I2C_MXC_I2C2 -#define CONFIG_SYS_I2C_MXC_I2C3 #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_I2C_EDID -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 - -/* Ethernet */ -#ifdef CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 -#endif /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -354,6 +341,11 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Watchdog */ +#if defined(CONFIG_SPL_BUILD) +#undef CONFIG_WDT +#undef CONFIG_WATCHDOG +#define CONFIG_HW_WATCHDOG +#endif /* ENV config */ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH |