diff options
| author | Sumit Garg <sumit.garg@nxp.com> | 2017-03-30 09:52:38 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-04-17 09:03:30 -0700 |
| commit | 4139b170377b357dbbbb86190cc181cce0edc91e (patch) | |
| tree | a422cbc743a77d12091fd8ffc5c439544744a99d /include/configs/ls1043ardb.h | |
| parent | 97fbf26d79701431b4dad1d4eae9d9f837b254cb (diff) | |
armv8: ls1043ardb: SPL size reduction
Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/ls1043ardb.h')
| -rw-r--r-- | include/configs/ls1043ardb.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index f185380ae3..ea929d1da0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -90,7 +90,9 @@ /* * NAND Flash Definitions */ +#ifndef SPL_NO_IFC #define CONFIG_NAND_FSL_IFC +#endif #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -213,6 +215,7 @@ #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3 /* EEPROM */ +#ifndef SPL_NO_EEPROM #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 @@ -220,11 +223,14 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#endif /* * Environment */ +#ifndef SPL_NO_ENV #define CONFIG_ENV_OVERWRITE +#endif #if defined(CONFIG_NAND_BOOT) #define CONFIG_ENV_IS_IN_NAND @@ -243,6 +249,7 @@ #endif /* FMan */ +#ifndef SPL_NO_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET #define CONFIG_PHYLIB @@ -266,23 +273,29 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif +#endif /* QE */ +#ifndef SPL_NO_QE #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE #endif #define CONFIG_SYS_QE_FW_ADDR 0x60600000 +#endif /* USB */ +#ifndef SPL_NO_USB #define CONFIG_HAS_FSL_XHCI_USB #ifdef CONFIG_HAS_FSL_XHCI_USB #define CONFIG_USB_XHCI_FSL #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif +#endif /* SATA */ +#ifndef SPL_NO_SATA #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_CMD_SCSI @@ -299,6 +312,7 @@ #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#endif #include <asm/fsl_secure_boot.h> |