diff options
| author | Tom Rini <trini@konsulko.com> | 2016-01-14 11:23:05 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-01-14 11:23:05 -0500 |
| commit | f46c25583a73042edf432b209ee4b93bc3f7e762 (patch) | |
| tree | a7cbd8afde1b0cbf86a9c8150cbd737df3ee82c9 /include/configs/maxbcm.h | |
| parent | db18f548cb7b5ff99223b66eac1966eb45230817 (diff) | |
| parent | f822d8578ba395d9af1cc315a2fb87b1eed3d355 (diff) | |
Merge git://www.denx.de/git/u-boot-marvell
Conflicts:
arch/arm/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/maxbcm.h')
| -rw-r--r-- | include/configs/maxbcm.h | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index da49243ebf..43d7fd03a3 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -10,10 +10,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#endif #define CONFIG_DISPLAY_BOARDINFO_LATE /* @@ -55,10 +51,7 @@ #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ #define CONFIG_PHY_MARVELL /* there is a marvell phy */ -#define CONFIG_PHY_ADDR { 0x0, 0x1, 0x2, 0x3 } -#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -#define CONFIG_RESET_PHY_R #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST @@ -91,9 +84,9 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) @@ -112,7 +105,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ +#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ |