diff options
| author | Heiko Schocher <hs@denx.de> | 2008-09-08 10:20:19 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-09-10 10:47:44 +0200 |
| commit | 4a02a2dca82aeab8f839db9dd35fda9d5412dacb (patch) | |
| tree | d93806b1599c05e4fbdcd4a9b7215c953614bad2 /include/configs/muas3001.h | |
| parent | a55d074dac24dc941f1afb5b4e94b1509bfdda4e (diff) | |
muas3001: activate WDT for the muas3001 board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'include/configs/muas3001.h')
| -rw-r--r-- | include/configs/muas3001.h | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/include/configs/muas3001.h b/include/configs/muas3001.h index 5d157b6c1e..55f7b1e540 100644 --- a/include/configs/muas3001.h +++ b/include/configs/muas3001.h @@ -38,6 +38,9 @@ /* Do boardspecific init */ #define CONFIG_BOARD_EARLY_INIT_R 1 +/* enable Watchdog */ +#define CONFIG_WATCHDOG 1 + /* * Select serial console configuration * @@ -181,8 +184,6 @@ #define CONFIG_BOOTCOMMAND "run net_nfs" #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -#undef CONFIG_WATCHDOG /* disable platform specific watchdog */ - /* * Miscellaneous configurable options */ @@ -277,11 +278,24 @@ #define CFG_HID2 0 #define CFG_SIUMCR 0x00200000 -#define CFG_SYPCR 0xFFFFFFC3 #define CFG_BCR 0x004c0000 #define CFG_SCCR 0x0 /*----------------------------------------------------------------------- + * SYPCR - System Protection Control 4-35 + * SYPCR can only be written once after reset! + *----------------------------------------------------------------------- + * Watchdog & Bus Monitor Timer max, 60x Bus Monitor enable + */ +#if defined(CONFIG_WATCHDOG) +#define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ + SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) +#else +#define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ + SYPCR_SWRI|SYPCR_SWP) +#endif /* CONFIG_WATCHDOG */ + +/*----------------------------------------------------------------------- * RMR - Reset Mode Register 5-5 *----------------------------------------------------------------------- * turn on Checkstop Reset Enable |