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authorTom Rini <trini@konsulko.com>2019-04-26 13:49:58 -0400
committerTom Rini <trini@konsulko.com>2019-04-26 13:49:58 -0400
commit1c64692df20c1f491ea79de3a732428611bb0ba0 (patch)
tree4942ec36730d3ef59c3dbca39adb1228c9b98602 /include/configs/socfpga_sr1500.h
parent7d994067424776b6184872b82fcaf4c0b95528f9 (diff)
parentbf068c7643f23c3f0936e3d1d292cc537acaf3bb (diff)
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'include/configs/socfpga_sr1500.h')
-rw-r--r--include/configs/socfpga_sr1500.h11
1 files changed, 0 insertions, 11 deletions
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index b6a98611c0..3a8ccc3021 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -19,8 +19,6 @@
/* The PHY is autodetected, so no MII PHY address is needed here */
#define PHY_ANEG_TIMEOUT 8000
-/* Environment */
-
/* Enable SPI NOR flash reset, needed for SPI booting */
#define CONFIG_SPI_N25Q256A_RESET
@@ -36,15 +34,6 @@
#define CONFIG_ENV_OFFSET 0x000e0000
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
-/*
- * The QSPI NOR flash layout on SR1500:
- *
- * 0000.0000 - 0003.ffff: SPL (4 times)
- * 0004.0000 - 000d.ffff: U-Boot
- * 000e.0000 - 000e.ffff: env1
- * 000f.0000 - 000f.ffff: env2
- */
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>