diff options
| author | Mario Six <mario.six@gdsys.cc> | 2019-01-21 09:17:42 +0100 |
|---|---|---|
| committer | Mario Six <mario.six@gdsys.cc> | 2019-05-21 07:51:40 +0200 |
| commit | 1e35d425d14b2ceb5136aea9fe1b53cdebd66a75 (patch) | |
| tree | c0cd3525710d78b4be369c60ef86ecd1ba9a3d61 /include/configs/ve8313.h | |
| parent | 7577cb19fc229ebd2a20e1cb8a94a2b423d4f0cf (diff) | |
ve8313: Merge BR/OR settings
The ve8313 has the option of either configuring the eLBC (enhanced local system bus) such that
* NOR flash is the first memory bank, and NAND flash is the second memory bank, or
* NAND flash is the first memory bank, and NOR flash is the second memory bank,
by using CONFIG_SYS_NOR_{BR,OR}_PRELIM and
CONFIG_SYS_NAND_{BR,OR}_PRELIM for defining
CONFIG_SYS_{BR,OR}{0,1}_PRELIM.
After Kconfig migration, replacing some lines in the defconfig will have
the same effect.
Hence, we will not create distinct ve8313_{NOR,NAND} configs for such a
small change.
Instead, fix the current default (NOR first, NAND second), and unroll
the CONFIG_SYS_NAND_{BR,OR}_PRELIM options. This will ease the Kconfig
migration
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/ve8313.h')
| -rw-r--r-- | include/configs/ve8313.h | 39 |
1 files changed, 19 insertions, 20 deletions
diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 791eac363b..87fbe36640 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -115,18 +115,6 @@ #define CONFIG_SYS_FLASH_SIZE 32 /* size in MB */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ -#define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE \ - | BR_PS_16 /* 16 bit */ \ - | BR_MS_GPCM /* MSEL = GPCM */ \ - | BR_V) /* valid */ -#define CONFIG_SYS_NOR_OR_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ - | OR_GPCM_CSNT \ - | OR_GPCM_ACS_DIV4 \ - | OR_GPCM_SCY_5 \ - | OR_GPCM_TRLX_SET \ - | OR_GPCM_EAD) - /* 0xfe000c55 */ - #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB) @@ -172,24 +160,35 @@ #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384 -#define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE \ + +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ + | BR_PS_16 /* 16 bit */ \ + | BR_MS_GPCM /* MSEL = GPCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_OR0_PRELIM (OR_AM_32MB \ + | OR_GPCM_CSNT \ + | OR_GPCM_ACS_DIV4 \ + | OR_GPCM_SCY_5 \ + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EAD) + /* 0xfe000c55 */ + +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_NAND_BASE \ | BR_PS_8 \ | BR_DECC_CHK_GEN \ | BR_MS_FCM \ | BR_V) /* valid */ /* 0x61000c21 */ -#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB \ +#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB \ | OR_FCM_BCTLD \ | OR_FCM_CHT \ | OR_FCM_SCY_2 \ | OR_FCM_RST \ - | OR_FCM_TRLX) - /* 0xffff90ac */ + | OR_FCM_TRLX) /* 0xffff90ac */ -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NOR_BR_PRELIM -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NOR_OR_PRELIM -#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM -#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM +/* Still needed for spl_minimal.c */ +#define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM +#define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE #define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB) |