diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2015-01-23 14:41:10 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-01-30 09:19:17 -0500 |
| commit | ffc103732c82faa945c85bbb7c5c34c30b6fac72 (patch) | |
| tree | e1d22343d1f45b36ed2f035ab667cbb5a8d0549e /include/configs/vexpress_aemv8a.h | |
| parent | f91afc4d001010a31b53c232b3b1873cb789381e (diff) | |
vexpress64: support the Juno Development Platform
The Juno Development Platform is a physical Versatile Express
device with some differences from the emulated semihosting
models. The main difference is that the system is split in
a SoC and an FPGA where the SoC hosts the serial ports at
totally different adresses.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/configs/vexpress_aemv8a.h')
| -rw-r--r-- | include/configs/vexpress_aemv8a.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 85894bedf8..7fb28a54ba 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -21,7 +21,8 @@ #define CONFIG_REMAKE_ELF -#ifndef CONFIG_TARGET_VEXPRESS64_BASE_FVP +#if !defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && \ + !defined(CONFIG_TARGET_VEXPRESS64_JUNO) /* Base FVP and Juno not using GICv3 yet */ #define CONFIG_GICV3 #endif @@ -44,6 +45,9 @@ /* ATF loads u-boot here for BASE_FVP model */ #define CONFIG_SYS_TEXT_BASE 0x88000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) +#elif CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_TEXT_BASE 0xe0000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #else #define CONFIG_SYS_TEXT_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) @@ -88,10 +92,15 @@ #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define V2M_UART0 0x7ff80000 +#define V2M_UART1 0x7ff70000 +#else /* Not Juno */ #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) +#endif #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) @@ -122,6 +131,9 @@ #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP #define GICD_BASE (0x2f000000) #define GICC_BASE (0x2c000000) +#elif CONFIG_TARGET_VEXPRESS64_JUNO +#define GICD_BASE (0x2C010000) +#define GICC_BASE (0x2C02f000) #else #define GICD_BASE (0x2C001000) #define GICC_BASE (0x2C002000) @@ -140,7 +152,11 @@ /* PL011 Serial Configuration */ #define CONFIG_PL011_SERIAL +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_PL011_CLOCK 7273800 +#else #define CONFIG_PL011_CLOCK 24000000 +#endif #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ (void *)CONFIG_SYS_SERIAL1} #define CONFIG_CONS_INDEX 0 @@ -161,6 +177,7 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_FLASH #define CONFIG_CMD_IMI +#define CONFIG_CMD_LOADB #define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_NET |