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authorAlison Wang <alison.wang@nxp.com>2019-03-06 14:49:14 +0800
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2019-03-15 11:52:01 +0530
commit158097052a6a528408e05d2345ff2ccdbb46036e (patch)
tree78453d3d716aef5368b91a620203c0487fe6f378 /include/configs
parentba7eadd8e107202ab90d0b2937044b6dcba4b7ae (diff)
armv7: ls102xa: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ls1021aiot.h2
-rw-r--r--include/configs/ls1021atwr.h2
2 files changed, 4 insertions, 0 deletions
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 6be8df109b..4af3988886 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -85,6 +85,8 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+#define CONFIG_CHIP_SELECTS_PER_CTRL 4
+
/*
* Serial Port
*/
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 4b6760b600..da55bf2f43 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -104,6 +104,8 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+#define CONFIG_CHIP_SELECTS_PER_CTRL 4
+
#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
!defined(CONFIG_QSPI_BOOT)
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR