diff options
author | Suniel Mahesh <sunil.m@techveda.org> | 2019-11-27 16:17:48 +0530 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2020-01-07 10:26:56 +0100 |
commit | 1699f0e59272ee3d42cdcd16c3501b4b71af6943 (patch) | |
tree | c2ce2f772bcd3bf8ce4b68572dc496723eb6a2b2 /include/configs | |
parent | 26d926d616f388accff45e9845e11f1de60674e9 (diff) |
arm: imx6: cm_fx6: Enable DM SPI and SPI_FLASH, fix SPL build errors
Enable driver model for SPI and SPI_FLASH to remove the following
compile warning on CM-FX6 SOM:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
====================================================
This change introduced SPL build error as shown:
In file included from include/common.h:47:0,
from drivers/mtd/spi/sf_probe.c:10:
drivers/mtd/spi/sf_probe.c: In function 'spi_flash_std_probe':
drivers/mtd/spi/sf_probe.c:149:54: error: dereferencing pointer to incomplete type 'struct dm_spi_slave_platdata'
scripts/Makefile.build:278: recipe for target 'spl/drivers/mtd/spi/sf_probe.o' failed
make[3]: *** [spl/drivers/mtd/spi/sf_probe.o] Error 1
scripts/Makefile.build:432: recipe for target 'spl/drivers/mtd/spi' failed
make[2]: *** [spl/drivers/mtd/spi] Error 2
Disabling DM for SPI support(SPI and SF) in SPL resolves the issue.
Target was compile tested, build was clean.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/cm_fx6.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index eb29f07032..53ae5f08eb 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -153,6 +153,13 @@ /* APBH DMA is required for NAND support */ #endif +/* SPI Flash Configs */ +#if defined(CONFIG_SPL_BUILD) +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#undef CONFIG_SPI_FLASH_MTD +#endif + /* Ethernet */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0 |