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authorPankit Garg <pankit.garg@nxp.com>2018-12-27 04:37:57 +0000
committerYork Sun <york.sun@nxp.com>2019-01-17 13:16:11 -0800
commit1a12b4a0ac769f1a292d70e7e5f5fd6cd3781ec8 (patch)
tree588108c84f6048a52b214f0adc6823e88f1b8f8c /include/configs
parent143af3c6d5d748f503ec87d3dd0dcce0297550a3 (diff)
armv8: ls1088aqds: Add TFABOOT support
TFABOOT support includes: - ls1088aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - MC address changes for TFABOOT - define BOOTCOMMAND for TFABOOT - ifc chip select changes for TFABOOT Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ls1088aqds.h99
1 files changed, 97 insertions, 2 deletions
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 829c5390cf..17d543d960 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -14,7 +14,15 @@ unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
#endif
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_ENV_SIZE 0x20000
+#define CONFIG_ENV_OFFSET 0x500000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
+ CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_SECT_SIZE 0x40000
+#else
#if defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_SECT_SIZE 0x40000
@@ -27,6 +35,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000
#endif
+#endif
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_QIXIS_I2C_ACCESS
@@ -209,6 +218,44 @@ unsigned long get_board_ddr_clk(void);
FTIM2_GPCM_TWP(0x3E))
#define SYS_FPGA_CS_FTIM3 0x0
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
+#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
+#define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR
+#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT
+#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR_EARLY
+#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR1_CSPR
+#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK_EARLY
+#define CONFIG_SYS_AMASK1_FINAL CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT
+#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
+#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT
+#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
+#define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL
+#define CONFIG_SYS_AMASK3 SYS_FPGA_AMASK
+#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR
+#define CONFIG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0
+#define CONFIG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1
+#define CONFIG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2
+#define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3
+#else
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
@@ -265,6 +312,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2
#define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3
#endif
+#endif
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
@@ -323,7 +371,8 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* QSPI device */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#if defined(CONFIG_TFABOOT) || \
+ defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define FSL_QSPI_FLASH_SIZE (1 << 26)
#define FSL_QSPI_FLASH_NUM 2
@@ -333,7 +382,8 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_EON
-#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
+#if !defined(CONFIG_TFABOOT) && \
+ !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_SF_DEFAULT_BUS 1
#define CONFIG_SF_DEFAULT_CS 0
#endif
@@ -377,6 +427,50 @@ unsigned long get_board_ddr_clk(void);
"fsl_mc start mc 0xa0a00000 0xa0e00000\0" \
"mcmemsize=0x70000000 \0"
#else /* if !(CONFIG_SECURE_BOOT) */
+#ifdef CONFIG_TFABOOT
+#define QSPI_MC_INIT_CMD \
+ "sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
+ "sf read 0x80100000 0xE00000 0x100000;" \
+ "fsl_mc start mc 0x80000000 0x80100000\0"
+#define SD_MC_INIT_CMD \
+ "mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
+ "mmc read 0x80100000 0x7000 0x800;" \
+ "fsl_mc start mc 0x80000000 0x80100000\0"
+#define IFC_MC_INIT_CMD \
+ "fsl_mc start mc 0x580A00000 0x580E00000\0"
+
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "hwconfig=fsl_ddr:bank_intlv=auto\0" \
+ "loadaddr=0x90100000\0" \
+ "kernel_addr=0x100000\0" \
+ "kernel_addr_sd=0x800\0" \
+ "ramdisk_addr=0x800000\0" \
+ "ramdisk_size=0x2000000\0" \
+ "fdt_high=0xa0000000\0" \
+ "initrd_high=0xffffffffffffffff\0" \
+ "kernel_start=0x1000000\0" \
+ "kernel_start_sd=0x8000\0" \
+ "kernel_load=0xa0000000\0" \
+ "kernel_size=0x2800000\0" \
+ "kernel_size_sd=0x14000\0" \
+ "mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
+ "sf read 0x80100000 0xE00000 0x100000;" \
+ "fsl_mc start mc 0x80000000 0x80100000\0" \
+ "mcmemsize=0x70000000 \0"
+#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0;" \
+ "sf read 0x80001000 0xd00000 0x100000;"\
+ " fsl_mc lazyapply dpl 0x80001000 &&" \
+ " sf read $kernel_load $kernel_start" \
+ " $kernel_size && bootm $kernel_load"
+#define SD_BOOTCOMMAND "mmcinfo;mmc read 0x80001000 0x6800 0x800;"\
+ " fsl_mc lazyapply dpl 0x80001000 &&" \
+ " mmc read $kernel_load $kernel_start_sd" \
+ " $kernel_size_sd && bootm $kernel_load"
+#define IFC_NOR_BOOTCOMMAND "fsl_mc lazyapply dpl 0x580d00000 &&" \
+ " cp.b $kernel_start $kernel_load" \
+ " $kernel_size && bootm $kernel_load"
+#else
#if defined(CONFIG_QSPI_BOOT)
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -427,6 +521,7 @@ unsigned long get_board_ddr_clk(void);
"mcinitcmd=fsl_mc start mc 0x580A00000 0x580E00000\0" \
"mcmemsize=0x70000000 \0"
#endif
+#endif /* CONFIG_TFABOOT */
#endif /* CONFIG_SECURE_BOOT */
#ifdef CONFIG_FSL_MC_ENET