diff options
| author | ken kuo <ken.kuoky@gmail.com> | 2013-06-08 11:14:09 +0800 |
|---|---|---|
| committer | Macpaul Lin <macpaul@gmail.com> | 2013-07-24 11:50:28 +0800 |
| commit | 3c016704d9c5418479e68e4690759cb2be6f90d3 (patch) | |
| tree | 420573e2d34c1f0c661e27d8f14d4a1cc75cef17 /include/configs | |
| parent | f6fd4140a5c7141a58a4e890951c9415be5347c4 (diff) | |
nds32: Enable two banks of SDRAM on Andes board
The original adp-ag101/adp-ag101p initialize only one bank(64MB)
by default at boot time, but it is not enough for some application,
so increasing to two banks(128M).
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/adp-ag101.h | 10 | ||||
| -rw-r--r-- | include/configs/adp-ag101p.h | 9 |
2 files changed, 17 insertions, 2 deletions
diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h index b6e3844699..1b84b04e4e 100644 --- a/include/configs/adp-ag101.h +++ b/include/configs/adp-ag101.h @@ -235,6 +235,11 @@ #define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \ CONFIG_SYS_FTSDMC021_BANK0_BASE) +#define CONFIG_SYS_FTSDMC021_BANK1_BASE \ + (CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20)) +#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \ + CONFIG_SYS_FTSDMC021_BANK1_BASE) + #endif /* @@ -248,9 +253,12 @@ #else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */ #define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */ #endif +#define PHYS_SDRAM_1 \ + (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */ #define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index ef55e35564..cec89f6dcf 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -236,6 +236,10 @@ #define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \ CONFIG_SYS_FTSDMC021_BANK0_BASE) +#define CONFIG_SYS_FTSDMC021_BANK1_BASE \ + (CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20)) +#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \ + CONFIG_SYS_FTSDMC021_BANK1_BASE) #endif /* @@ -249,9 +253,12 @@ #else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */ #define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */ #endif +#define PHYS_SDRAM_1 \ + (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */ #define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 |