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| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2014-01-13 13:01:06 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-01-21 14:02:21 -0800 |
| commit | 3fdc827ca8a770848e8104c42cd6d8321d8c86ff (patch) | |
| tree | 82f066b5bc2ddd5d0c09c6fdddefefc70b842ac5 /include/configs | |
| parent | eb6b458cef28c86603d56a27b9ee699b13c60c14 (diff) | |
t2080qds/ddr: update ddr parameters
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
unrelated to DDR3/3L.
Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs')
0 files changed, 0 insertions, 0 deletions