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authorLey Foon Tan <ley.foon.tan@intel.com>2020-03-06 16:55:19 +0800
committerMarek Vasut <marex@denx.de>2020-03-31 02:52:38 +0200
commit4f17f2966a8d7b624b5aff58ebe5a0245038c25a (patch)
treea633ddb6fa9925c0d33233a484abb3fa0f7ae432 /include/configs
parent69f9c8bab83fff7228547f3cf01bf3c123faaaf4 (diff)
configs: socfpga: Change to use SOCFPGA_PHYS_OCRAM_SIZE macro
Change to use SOCFPGA_PHYS_OCRAM_SIZE macro for onchip RAM size. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/socfpga_common.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index ec41843695..410ec80618 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -21,14 +21,15 @@
#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
+#define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000
/* SPL memory allocation configuration, this is for FAT implementation */
#ifndef CONFIG_SYS_SPL_MALLOC_SIZE
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000
#endif
-#define CONFIG_SYS_INIT_RAM_SIZE (0x40000 - CONFIG_SYS_SPL_MALLOC_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE (SOCFPGA_PHYS_OCRAM_SIZE - \
+ CONFIG_SYS_SPL_MALLOC_SIZE)
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE)
#endif