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authorRosy Song <rosysong@rosinson.com>2019-03-16 09:24:44 +0800
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2019-04-12 17:32:50 +0200
commit61290fb52c38655d2d92f80bdfd7a62bd54aaebf (patch)
treefd67e8a3f904cb2652fe21dbfbced25a106381e6 /include/configs
parentfda1bb057441a8ec1b0f52e24933694ddd78cef4 (diff)
mips: add initial support for qca956x referenced board
QCA9563 is CPU used on AP152 board : Clock speed : 750 MHz , Arch : Mips 74Kc, Eth : SGMII interface, MIMO config : 3 * 3 450M, 2 * USB 2.0, Signed-off-by: Rosy Song <rosysong@rosinson.com> Changes for v2: - coding style cleanup - remove ununsed flash chip in defconfig - enable automatic icache / dcache size in defconfig Changes for v3: - add detailed information for qca956x in commit message Changes for v4: - remove pre-configured network settings in ap152.h Changes for v5: - coding style cleanup
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ap152.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/include/configs/ap152.h b/include/configs/ap152.h
new file mode 100644
index 0000000000..c948a44054
--- /dev/null
+++ b/include/configs/ap152.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rosy Song <rosysong@rosinson.com>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_MHZ 375
+#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_MALLOC_LEN 0x40000
+#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
+
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+#define CONFIG_SYS_LOAD_ADDR 0x81000000
+
+#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
+
+/*
+ * Serial Port
+ */
+#define CONFIG_SYS_NS16550_CLK 25000000
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_BOOTCOMMAND "sf probe;" \
+ "mtdparts default;" \
+ "bootm 0x9f060000"
+
+#define CONFIG_ENV_SPI_MAX_HZ 25000000
+#define CONFIG_ENV_OFFSET 0x40000
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#define CONFIG_ENV_SIZE 0x10000
+
+/* Miscellaneous configurable options */
+
+/*
+ * Diagnostics
+ */
+#define CONFIG_SYS_MEMTEST_START 0x80100000
+#define CONFIG_SYS_MEMTEST_END 0x83f00000
+
+#endif /* __CONFIG_H */