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authorDinh Nguyen <dinguyen@opensource.altera.com>2015-03-30 17:01:03 -0500
committerMarek Vasut <marex@denx.de>2015-04-21 12:23:16 +0200
commit6868160ab1b55252206b983ef86770e4f778ec45 (patch)
tree6cb47d02b66ef4e8bc11e0a4961629c97e341f46 /include/configs
parent1733259d25015c28c47990ec11af99b3f62f811c (diff)
arm: socfpga: spl: Add CONFIG_SPL_MAX_SIZE to be 64KB
The Cyclone5 SoCFPGA has 64KB of OCRAM for SPL use. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/socfpga_common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 1ecd56f42a..9b29c6059a 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -292,6 +292,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024)
+#define CONFIG_SPL_MAX_SIZE (64 * 1024)
#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
#define CONFIG_CRC32_VERIFY