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authorwdenk <wdenk>2003-09-10 22:30:53 +0000
committerwdenk <wdenk>2003-09-10 22:30:53 +0000
commit7205e4075d8b50e4dd89fe39ed03860b23cbb704 (patch)
tree0dfa865e7087ff4ee07967a2531c91ff5645a802 /include/configs
parent149dded2b178bc0fb62cb6f61b87968d914b580a (diff)
* Patches by Denis Peter, 9 Sep 2003:
add FAT support for IDE, SCSI and USB * Patches by Gleb Natapov, 2 Sep 2003: - cleanup of POST code for unsupported architectures - MPC824x locks way0 of data cache for use as initial RAM; this patch unlocks it after relocation to RAM and invalidates the locked entries. * Patch by Gleb Natapov, 30 Aug 2003: new I2C driver for mpc107 bridge. Now works from flash. * Patch by Dave Ellis, 11 Aug 2003: - JFFS2: fix typo in common/cmd_jffs2.c - JFFS2: fix CFG_JFFS2_SORT_FRAGMENTS option - JFFS2: remove node version 0 warning - JFFS2: accept JFFS2 PADDING nodes - SXNI855T: add AM29LV800 support - SXNI855T: move environment from EEPROM to flash - SXNI855T: boot from JFFS2 in NOR or NAND flash * Patch by Bill Hargen, 11 Aug 2003: fixes for I2C on MPC8240 - fix i2c_write routine - fix iprobe command - eliminates use of global variables, plus dead code, cleanup.
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/AdderII.h4
-rw-r--r--include/configs/MIP405.h10
-rw-r--r--include/configs/PIP405.h12
-rw-r--r--include/configs/SXNI855T.h29
4 files changed, 39 insertions, 16 deletions
diff --git a/include/configs/AdderII.h b/include/configs/AdderII.h
index c2cff23a1c..4c2ba7d582 100644
--- a/include/configs/AdderII.h
+++ b/include/configs/AdderII.h
@@ -48,10 +48,10 @@
#define CONFIG_CLOCKS_IN_MHZ 1
/* Monitor Functions */
-#define CONFIG_COMMANDS ( CFG_CMD_FLASH | \
+#define CONFIG_COMMANDS ( CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
CFG_CMD_MEMORY| \
CFG_CMD_NET | \
- CFG_CMD_ENV | \
CFG_CMD_PING | \
CFG_CMD_SDRAM )
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 49b830b86f..61a799daa4 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -67,6 +67,7 @@
CFG_CMD_DATE | \
CFG_CMD_ELF | \
CFG_CMD_MII | \
+ CFG_CMD_FAT | \
CFG_CMD_PING | \
CFG_CMD_SAVES | \
CFG_CMD_BSP )
@@ -246,9 +247,10 @@
/*
* Init Memory Controller:
*/
-
-#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */
-#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
+#define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */
+#define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */
+/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
+#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
#define CONFIG_BOARD_PRE_INIT
@@ -325,7 +327,7 @@
#undef CONFIG_IDE_LED /* no led for ide supported */
#define CONFIG_IDE_RESET /* reset for ide supported... */
#define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */
-
+#define CONFIG_SUPPORT_VFAT
/************************************************************
* ATAPI support (experimental)
************************************************************/
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index d9f8be8eed..b9107ccf7c 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -50,11 +50,13 @@
CFG_CMD_PCI | \
CFG_CMD_CACHE | \
CFG_CMD_IRQ | \
+ CFG_CMD_ECHO | \
CFG_CMD_EEPROM | \
CFG_CMD_I2C | \
CFG_CMD_REGINFO | \
CFG_CMD_FDC | \
CFG_CMD_SCSI | \
+ CFG_CMD_FAT | \
CFG_CMD_DATE | \
CFG_CMD_ELF | \
CFG_CMD_USB | \
@@ -141,7 +143,7 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-
+#define CONFIG_MISC_INIT_R
/***********************************************************
* Miscellaneous configurable options
**********************************************************/
@@ -231,9 +233,12 @@
/*
* Init Memory Controller:
*/
+#define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */
+#define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */
+/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
+#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
-#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */
-#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
+#define CONFIG_BOARD_PRE_INIT
/* Configuration Port location */
#define CONFIG_PORT_ADDR 0xF4000000
@@ -299,6 +304,7 @@
#undef CONFIG_IDE_LED /* no led for ide supported */
#define CONFIG_IDE_RESET /* reset for ide supported... */
#define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */
+#define CONFIG_SUPPORT_VFAT
/************************************************************
* ATAPI support (experimental)
diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h
index bdaf683c36..d6fa798075 100644
--- a/include/configs/SXNI855T.h
+++ b/include/configs/SXNI855T.h
@@ -145,12 +145,22 @@
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
CFG_CMD_EEPROM | \
+ CFG_CMD_JFFS2 | \
CFG_CMD_NAND | \
CFG_CMD_DATE)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_JFFS_CUSTOM_PART
+#define CFG_JFFS2_SORT_FRAGMENTS
+/* JFFS2 location when using NOR flash */
+#define CFG_JFFS2_BASE (CFG_FLASH_BASE + 0x80000)
+#define CFG_JFFS2_SIZE (0x780000)
+/* JFFS2 location (in RAM) when using NAND flash */
+#define CFG_JFFS2_RAMBASE 0x400000
+#define CFG_JFFS2_RAMSIZE 0x200000 /* NAND boot partition is 2MiB */
+
/* NAND flash support */
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
@@ -405,13 +415,18 @@
#define CONFIG_RESET_ON_PANIC /* reset if system panic() */
-/* to put environment in EEROM */
-#define CFG_ENV_IS_IN_EEPROM 1
-#define CFG_ENV_OFFSET 0 /* Start right at beginning of NVRAM */
-#define CFG_ENV_SIZE 1024 /* Use only a part of it*/
-
-#if 1
-#define CONFIG_BOOT_RETRY_TIME 60 /* boot if no command in 60 seconds */
+#define CFG_ENV_IS_IN_FLASH
+#ifdef CFG_ENV_IS_IN_FLASH
+ /* environment is in FLASH */
+ #define CFG_ENV_ADDR 0xF8040000 /* AM29LV641 or AM29LV800BT */
+ #define CFG_ENV_ADDR_REDUND 0xF8050000 /* AM29LV641 or AM29LV800BT */
+ #define CFG_ENV_SECT_SIZE 0x00010000
+ #define CFG_ENV_SIZE 0x00002000
+#else
+ /* environment is in EEPROM */
+ #define CFG_ENV_IS_IN_EEPROM 1
+ #define CFG_ENV_OFFSET 0 /* at beginning of EEPROM */
+ #define CFG_ENV_SIZE 1024 /* Use only a part of it*/
#endif
#if 1