diff options
author | Simon Glass <sjg@chromium.org> | 2015-08-30 19:18:58 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2015-09-11 14:08:06 -0400 |
commit | 7495e41ba6420b6a5fd8928cded32d789d4c1639 (patch) | |
tree | 5002c45bec58ac47708fddc74bf8a08ee2fe0c57 /include/configs | |
parent | af7f884ba1e6a1afbf2a75247d1bcd262d4314b2 (diff) |
arm: Remove snowball and u8500_href boards
These boards have not been converted to generic board by the deadline.
Remove them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/snowball.h | 232 | ||||
-rw-r--r-- | include/configs/u8500_href.h | 198 |
2 files changed, 0 insertions, 430 deletions
diff --git a/include/configs/snowball.h b/include/configs/snowball.h deleted file mode 100644 index de03e76ba1..0000000000 --- a/include/configs/snowball.h +++ /dev/null @@ -1,232 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2009 - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * #define DEBUG 1 - */ - -#define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SNOWBALL -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_BOARD_LATE_INIT - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_U8500 - -#define CONFIG_SYS_MEMTEST_START 0x00000000 -#define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF - -/*----------------------------------------------------------------------- - * Size of environment and malloc() pool - */ -/* - * If you use U-Boot as crash kernel, make sure that it does not overwrite - * information saved by kexec during panic. Kexec expects the start - * address of the executable 32K above "crashkernel" address. - */ -/* - * Size of malloc() pool - */ -#define CONFIG_ENV_SIZE (8*1024) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) - -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_CMD_ENV -#define CONFIG_ENV_OFFSET 0x0118000 -#define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */ - -/* - * PL011 Configuration - */ -#define CONFIG_PL011_SERIAL -#define CONFIG_PL011_SERIAL_RLCR -#define CONFIG_PL011_SERIAL_FLUSH_ON_INIT - -/* - * U8500 UART registers base for 3 serial devices - */ -#define CFG_UART0_BASE 0x80120000 -#define CFG_UART1_BASE 0x80121000 -#define CFG_UART2_BASE 0x80007000 -#define CFG_SERIAL0 CFG_UART0_BASE -#define CFG_SERIAL1 CFG_UART1_BASE -#define CFG_SERIAL2 CFG_UART2_BASE -#define CONFIG_PL011_CLOCK 38400000 -#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \ - (void *)CFG_SERIAL2 } -#define CONFIG_CONS_INDEX 2 -#define CONFIG_BAUDRATE 115200 - -/* - * Devices and file systems - */ -#define CONFIG_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION - -/* - * Commands - */ -#define CONFIG_CMD_MMC -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 - -#ifndef CONFIG_BOOTDELAY -#define CONFIG_BOOTDELAY 1 -#endif -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ - -#undef CONFIG_BOOTARGS -#define CONFIG_BOOTCOMMAND \ -"mmc dev 1; " \ - "if run loadbootscript; " \ - "then run bootscript; " \ - "else " \ - "if run mmcload; " \ - "then run mmcboot; " \ - "else " \ - "mmc dev 0; " \ - "if run emmcloadbootscript; " \ - "then run bootscript; " \ - "else " \ - "if run emmcload; " \ - "then run emmcboot; " \ - "else " \ - "echo No media to boot from; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi; " - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=n\0" \ - "loadaddr=0x00100000\0" \ - "console=ttyAMA2,115200n8\0" \ - "loadbootscript=fatload mmc 1:1 ${loadaddr} boot.scr\0" \ - "emmcloadbootscript=fatload mmc 0:2 ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript " \ - "from mmc ...; source ${loadaddr}\0" \ - "memargs256=mem=96M@0 mem_modem=32M@96M mem=32M@128M " \ - "hwmem=22M@160M pmem_hwb=42M@182M mem_mali=32@224M\0" \ - "memargs512=mem=96M@0 mem_modem=32M@96M hwmem=32M@128M " \ - "mem=64M@160M mem_mali=32M@224M " \ - "pmem_hwb=128M@256M mem=128M@384M\0" \ - "memargs1024=mem=128M@0 mali.mali_mem=32M@128M " \ - "hwmem=168M@M160M mem=48M@328M " \ - "mem_issw=1M@383M mem=640M@384M\0" \ - "memargs=setenv bootargs ${bootargs} ${memargs1024}\0" \ - "emmcload=fatload mmc 0:2 ${loadaddr} uImage\0" \ - "mmcload=fatload mmc 1:1 ${loadaddr} uImage\0" \ - "commonargs=setenv bootargs console=${console} " \ - "vmalloc=300M\0" \ - "emmcargs=setenv bootargs ${bootargs} " \ - "root=/dev/mmcblk0p3 " \ - "rootwait\0" \ - "addcons=setenv bootargs ${bootargs} " \ - "console=${console}\0" \ - "emmcboot=echo Booting from eMMC ...; " \ - "run commonargs emmcargs memargs; " \ - "bootm ${loadaddr}\0" \ - "mmcargs=setenv bootargs ${bootargs} " \ - "root=/dev/mmcblk1p2 " \ - "rootwait earlyprintk\0" \ - "mmcboot=echo Booting from external MMC ...; " \ - "run commonargs mmcargs memargs; " \ - "bootm ${loadaddr}\0" \ - "fdt_high=0x2BC00000\0" \ - "stdout=serial,usbtty\0" \ - "stdin=serial,usbtty\0" \ - "stderr=serial,usbtty\0" - -/*----------------------------------------------------------------------- - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ - -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ - + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */ - -#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 - -#define CONFIG_SYS_HUSH_PARSER 1 -#define CONFIG_CMDLINE_EDITING - -#define CONFIG_SETUP_MEMORY_TAGS 2 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */ - -/* - * additions for new relocation code - */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_MAX_RAM_SIZE 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET - -/* landing address before relocation */ -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x0 -#endif - -/* - * MMC related configs - */ -#define CONFIG_ARM_PL180_MMCI -#define MMC_BLOCK_SIZE 512 -#define CFG_EMMC_BASE 0x80114000 -#define CFG_MMC_BASE 0x80126000 - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_NO_FLASH - -/* - * base register values for U8500 - */ -#define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock */ - - -/* - * U8500 GPIO register base for 9 banks - */ -#define CONFIG_DB8500_GPIO -#define CFG_GPIO_0_BASE 0x8012E000 -#define CFG_GPIO_1_BASE 0x8012E080 -#define CFG_GPIO_2_BASE 0x8000E000 -#define CFG_GPIO_3_BASE 0x8000E080 -#define CFG_GPIO_4_BASE 0x8000E100 -#define CFG_GPIO_5_BASE 0x8000E180 -#define CFG_GPIO_6_BASE 0x8011E000 -#define CFG_GPIO_7_BASE 0x8011E080 -#define CFG_GPIO_8_BASE 0xA03FE000 - -#define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h deleted file mode 100644 index a8cc0306cb..0000000000 --- a/include/configs/u8500_href.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2009 - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_U8500 - -#define CONFIG_SYS_MEMTEST_START 0x00000000 -#define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF - -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT - -/* - * Size of malloc() pool - */ -#ifdef CONFIG_BOOT_SRAM -#define CONFIG_ENV_SIZE (32*1024) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 64*1024) -#else -#define CONFIG_ENV_SIZE (128*1024) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) -#endif - -/* - * PL011 Configuration - */ -#define CONFIG_PL011_SERIAL -#define CONFIG_PL011_SERIAL_RLCR -#define CONFIG_PL011_SERIAL_FLUSH_ON_INIT - -/* - * U8500 UART registers base for 3 serial devices - */ -#define CFG_UART0_BASE 0x80120000 -#define CFG_UART1_BASE 0x80121000 -#define CFG_UART2_BASE 0x80007000 -#define CFG_SERIAL0 CFG_UART0_BASE -#define CFG_SERIAL1 CFG_UART1_BASE -#define CFG_SERIAL2 CFG_UART2_BASE -#define CONFIG_PL011_CLOCK 38400000 -#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \ - (void *)CFG_SERIAL2 } -#define CONFIG_CONS_INDEX 2 -#define CONFIG_BAUDRATE 115200 - -/* - * Devices and file systems - */ -#define CONFIG_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION - -/* - * Commands - */ -#define CONFIG_CMD_MMC -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_I2C - -#ifndef CONFIG_BOOTDELAY -#define CONFIG_BOOTDELAY 1 -#endif -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ - -#undef CONFIG_BOOTARGS -#define CONFIG_BOOTCOMMAND "run emmcboot" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=n\0" \ - "loadaddr=0x00100000\0" \ - "console=ttyAMA2,115200n8\0" \ - "memargs256=mem=96M@0 mem_modem=32M@96M mem=30M@128M " \ - "pmem=22M@158M pmem_hwb=44M@180M mem_mali=32@224M\0" \ - "memargs512=mem=96M@0 mem_modem=32M@96M mem=44M@128M " \ - "pmem=22M@172M mem=30M@194M mem_mali=32M@224M " \ - "pmem_hwb=54M@256M mem=202M@310M\0" \ - "commonargs=setenv bootargs cachepolicy=writealloc noinitrd " \ - "init=init " \ - "board_id=${board_id} " \ - "logo.${logo} " \ - "startup_graphics=${startup_graphics}\0" \ - "emmcargs=setenv bootargs ${bootargs} " \ - "root=/dev/mmcblk0p2 " \ - "rootdelay=1\0" \ - "addcons=setenv bootargs ${bootargs} " \ - "console=${console}\0" \ - "emmcboot=echo Booting from eMMC ...; " \ - "run commonargs emmcargs addcons memargs;" \ - "mmc read 0 ${loadaddr} 0xA0000 0x4000;" \ - "bootm ${loadaddr}\0" \ - "flash=mmc init 1;fatload mmc 1 ${loadaddr} flash.scr;" \ - "source ${loadaddr}\0" \ - "loaduimage=mmc init 1;fatload mmc 1 ${loadaddr} uImage\0" \ - "usbtty=cdc_acm\0" \ - "stdout=serial,usbtty\0" \ - "stdin=serial,usbtty\0" \ - "stderr=serial,usbtty\0" - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ - -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ - + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */ - -#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE - -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_CMDLINE_EDITING - -#define CONFIG_SETUP_MEMORY_TAGS 2 -#define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ - -/* - * I2C - */ -#define CONFIG_U8500_I2C -#undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0 /* slave addr of controller */ -#define CONFIG_SYS_U8500_I2C0_BASE 0x80004000 -#define CONFIG_SYS_U8500_I2C1_BASE 0x80122000 -#define CONFIG_SYS_U8500_I2C2_BASE 0x80128000 -#define CONFIG_SYS_U8500_I2C3_BASE 0x80110000 -#define CONFIG_SYS_U8500_I2C_BUS_MAX 4 - -#define CONFIG_SYS_I2C_GPIOE_ADDR 0x42 /* GPIO expander chip addr */ -#define CONFIG_TC35892_GPIO - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */ -#define PHYS_SDRAM_SIZE_1 0x20000000 /* 512 MB */ - -/* - * additions for new relocation code - */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET - -/* landing address before relocation */ -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x0 -#endif - -/* - * MMC related configs - * NB Only externa SD slot is currently supported - */ -#define MMC_BLOCK_SIZE 512 -#define CONFIG_ARM_PL180_MMCI -#define CONFIG_ARM_PL180_MMCI_BASE 0x80126000 /* MMC base for 8500 */ -#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000 -#define CONFIG_MMC_DEV_NUM 1 - -#define CONFIG_CMD_ENV -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET 0x13F80000 -#define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */ - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_NO_FLASH - -/* - * base register values for U8500 - */ -#define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock - management unit */ -#define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */ - -#endif /* __CONFIG_H */ |