diff options
| author | Vladimir Zapolskiy <vz@mleia.com> | 2016-11-28 00:15:22 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-12-02 21:32:45 -0500 |
| commit | 765270472285665fbb01735cd74ce2ba6232493f (patch) | |
| tree | b61257c458283326823eb21651701fd98efbdf93 /include/configs | |
| parent | b032eb1f71c0382146ecc3c87e7b00e31c312474 (diff) | |
r2dplus: use P1 area space for text base and PCI system memory
While both options are acceptable use P1 area physical addresses
instead of external memory space of text base and PCI system memory
for unification purposes, all other supported superh boards have the
same selection.
This allows to easily ensure that CONFIG_SYS_TEXT_BASE is located
within available DRAM.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/r2dplus.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 2186915fee..21bfe724ae 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -26,10 +26,10 @@ #define CONFIG_ENV_OVERWRITE 1 /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE (0x8C000000) -#define CONFIG_SYS_SDRAM_SIZE (0x04000000) +#define CONFIG_SYS_SDRAM_BASE 0x8C000000 +#define CONFIG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_TEXT_BASE 0x0FFC0000 +#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE 256 @@ -99,8 +99,8 @@ #define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */ -#define CONFIG_PCI_SYS_BUS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff) -#define CONFIG_PCI_SYS_PHYS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff) +#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE #endif /* __CONFIG_H */ |