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authorJim Lin <jilin@nvidia.com>2013-11-06 14:03:44 +0800
committerTom Warren <twarren@nvidia.com>2013-12-18 10:19:48 -0700
commit81d21e98b00c45372aaa9f47a6e9035f8daf843f (patch)
tree70adc2719d0fb617a79f47787e53914d5cc4df65 /include/configs
parent7dcd3a21ff556a196d60227fa04c9cdc5f9faa9c (diff)
ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"
Fix the timeout issue after running "bootp" command in u-boot console. For example you see "EHCI timed out on TD- token=0x...". TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a controller reset and before RUN bit is set (per technical reference manual). Signed-off-by: Jim Lin <jilin@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/tegra114-common.h1
-rw-r--r--include/configs/tegra30-common.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index c3de9a999e..a4e8a5f5eb 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -82,5 +82,6 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#endif /* _TEGRA114_COMMON_H_ */
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index 99acbfd28b..b5550d7d09 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -79,5 +79,6 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#endif /* _TEGRA30_COMMON_H_ */