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authorMarek Vasut <marek.vasut@gmail.com>2017-05-13 15:57:45 +0200
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2017-05-22 04:38:27 +0900
commit8474681c3eb37f65c08eb9080cef817c38ee60c4 (patch)
tree4eab5e70a9e9488c974cc288871b1866b1780116 /include/configs
parent60c48e42a073a34fd39caa802c826a4e3de53514 (diff)
ARM: rmobile: salvator-x: Adjust UART clock
The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . Use the internal clock and ignore the early version of the chip. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/salvator-x.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index 81a7226d62..94f62a7358 100644
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -20,7 +20,7 @@
#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF2
#define CONFIG_CONS_INDEX 2
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ
/* [A] Hyper Flash */
/* use to RPC(SPI Multi I/O Bus Controller) */
@@ -31,10 +31,11 @@
#define RCAR_XTAL_CLK 33333333u
#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
-/* CPclk 16.66MHz, S3D2 133.33MHz */
+/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */
#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
+#define CONFIG_S3D4_CLK_FREQ (266666666u/4)
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */