diff options
| author | Wenyou.Yang@microchip.com <Wenyou.Yang@microchip.com> | 2017-07-21 17:06:40 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-08-04 20:38:37 -0400 |
| commit | a818704b2eeeb7100e5a95f54a6db4be36dba630 (patch) | |
| tree | efd5f87dbf5017d3cf848804e53c8b6bf60f799d /include/configs | |
| parent | c53a825e15ca74902e9d5f68d839011dc11e055f (diff) | |
board: meesc: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/meesc.h | 34 |
1 files changed, 5 insertions, 29 deletions
diff --git a/include/configs/meesc.h b/include/configs/meesc.h index baa313ceb3..f256dcb47f 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -49,14 +49,6 @@ * Hardware drivers */ -/* general purpose I/O */ -#define CONFIG_AT91_GPIO - -/* Console output */ -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS - /* * BOOTP options */ @@ -65,9 +57,6 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME -/* LED */ -#define CONFIG_AT91_LED - /* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. @@ -89,18 +78,7 @@ * that address while providing maximum stack area below. */ #define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) - -/* DataFlash */ -#ifdef CONFIG_SYS_USE_DATAFLASH -# define CONFIG_ATMEL_DATAFLASH_SPI -# define CONFIG_HAS_DATAFLASH -# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 -# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -# define AT91_SPI_CLK 15000000 -# define DATAFLASH_TCSS (0x1a << 16) -# define DATAFLASH_TCHS (0x1 << 24) -#endif + (ATMEL_BASE_SRAM0 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -126,12 +104,10 @@ #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env in dataflash on CS0 */ -# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ - 0x8400) -# define CONFIG_ENV_OFFSET 0x4200 -# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ - CONFIG_ENV_OFFSET) -# define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_ENV_SECT_SIZE 0x210 +#define CONFIG_ENV_SPI_MAX_HZ 15000000 #elif CONFIG_SYS_USE_NANDFLASH |