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authorLiu Yu <yu.liu@freescale.com>2008-10-10 11:40:58 +0800
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:07 +0200
commitbff188baf9427c35745356439435acf3864d4c65 (patch)
tree2d3c628de7bcb2f7340250823d4d50162470ea64 /include/configs
parent5e981d683d2363204c76773941c2e9c2044c808f (diff)
Make pixis_set_sgmii more general to support MPC85xx boards.
The pixis sgmii command depend on the FPGA support on the board, some 85xx boards support SGMII riser card but did not support this command, define CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command. Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and PIXIS_VCFGEN1_MASK in header file for both boards. Signed-off-by: Liu Yu <yu.liu@freescale.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/MPC8544DS.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 6b7558bea4..0987448b71 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -202,6 +202,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define PIXIS_VSPEED2_TSEC3SER 0x1
#define PIXIS_VCFGEN1_TSEC1SER 0x20
#define PIXIS_VCFGEN1_TSEC3SER 0x40
+#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER)
+#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
/* define to use L1 as initial stack */
@@ -374,6 +376,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_TSEC3 1
#define CONFIG_TSEC3_NAME "eTSEC3"
+#define CONFIG_PIXIS_SGMII_CMD
#define CONFIG_FSL_SGMII_RISER 1
#define SGMII_RISER_PHY_OFFSET 0x1c