Merge branch 'next' of ../next

21 files changed, 695 insertions, 45 deletions

diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h
index ffaab79618..37dd757732 100644
--- a/include/configs/AP1000.h
+++ b/include/configs/AP1000.h
@@ -33,6 +33,7 @@
  * run from RAM instead of Flash.
  */
 #define	CONFIG_SYS_TEXT_BASE	0x08000000
+#define CONFIG_SYS_LDSCRIPT	"board/amirix/ap1000/u-boot.lds"
 
 #define CONFIG_PCI	1
 
diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h
index 3706071c99..53229d94b5 100644
--- a/include/configs/DASA_SIM.h
+++ b/include/configs/DASA_SIM.h
@@ -37,6 +37,7 @@
 #define CONFIG_DASA_SIM		1	/* ...on a DASA_SIM board	*/
 
 #define	CONFIG_SYS_TEXT_BASE	0xFFFC0000
+#define CONFIG_SYS_LDSCRIPT	"board/esd/dasa_sim/u-boot.lds"
 
 #define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
diff --git a/include/configs/ML2.h b/include/configs/ML2.h
index 1e96b9e10e..4df9f4cbc5 100644
--- a/include/configs/ML2.h
+++ b/include/configs/ML2.h
@@ -31,6 +31,7 @@
 #define CONFIG_ML2	1	/* ...on a ML2 board	*/
 
 #define	CONFIG_SYS_TEXT_BASE	0x18000000
+#define CONFIG_SYS_LDSCRIPT	"board/ml2/u-boot.lds"
 
 #define CONFIG_ENV_IS_IN_FLASH     1
 
diff --git a/include/configs/MOUSSE.h b/include/configs/MOUSSE.h
index 9529c87503..c809a6b363 100644
--- a/include/configs/MOUSSE.h
+++ b/include/configs/MOUSSE.h
@@ -50,6 +50,7 @@
 #define CONFIG_MOUSSE       1
 
 #define	CONFIG_SYS_TEXT_BASE	0xFFF00000
+#define	CONFIG_SYS_LDSCRIPT	"board/mousse/u-boot.lds"
 
 #define CONFIG_SYS_ADDR_MAP_B      1
 
diff --git a/include/configs/MVSMR.h b/include/configs/MVSMR.h
index f7fd9b2eb0..f94ad5caf2 100644
--- a/include/configs/MVSMR.h
+++ b/include/configs/MVSMR.h
@@ -35,6 +35,7 @@
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE	0xFF800000
 #endif
+#define CONFIG_SYS_LDSCRIPT	"board/matrix_vision/mvsmr/u-boot.lds"
 
 #define CONFIG_SYS_MPC5XXX_CLKIN	33000000
 
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index b411fc8bb7..7e6c40fc6f 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -356,6 +356,7 @@
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_SETEXPR
+#define CONFIG_CMD_REGINFO
 
 #ifdef CONFIG_PCI
 #define CONFIG_CMD_PCI
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index c2f6b8a7b3..3154e13f2f 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -49,7 +49,8 @@
 #endif
 
 /* On a Cameron or on a FO300 board or ...				*/
-#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
+#if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
+	&& !defined(CONFIG_FO300)
 #define CONFIG_STK52XX		1	/* ... on a STK52XX board		*/
 #endif
 
@@ -79,7 +80,7 @@
 							/* switch is open */
 #endif	/* CONFIG_FO300 */
 
-#ifdef CONFIG_STK52XX
+#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
 #define CONFIG_PS2KBD			/* AT-PS/2 Keyboard		*/
 #define CONFIG_PS2MULT			/* .. on PS/2 Multiplexer	*/
 #define CONFIG_PS2SERIAL	6	/* .. on PSC6			*/
@@ -92,7 +93,7 @@
  * 0x40000000 - 0x4fffffff - PCI Memory
  * 0x50000000 - 0x50ffffff - PCI IO Space
  */
-#ifdef CONFIG_STK52XX
+#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
 #define CONFIG_PCI		1
 #define CONFIG_PCI_PNP		1
 /* #define CONFIG_PCI_SCAN_SHOW	1 */
@@ -140,7 +141,8 @@
 #define CONFIG_ISO_PARTITION
 
 /* USB */
-#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
+#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
+    defined(CONFIG_STK52XX)
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 #define CONFIG_USB_STORAGE
@@ -204,13 +206,15 @@
 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	1
 #endif
 
-#if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
+#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
+	defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
     #define CONFIG_CMD_IDE
     #define CONFIG_CMD_FAT
     #define CONFIG_CMD_EXT2
 #endif
 
-#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
+#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
+	defined(CONFIG_STK52XX)
     #define CONFIG_CFG_USB
     #define CONFIG_CFG_FAT
 #endif
@@ -269,6 +273,11 @@
 	"fdt_addr=FC100000\0"						\
 	"kernel_addr=FC140000\0"					\
 	"ramdisk_addr=FC600000\0"
+#elif defined(CONFIG_CHARON)
+#define ENV_FLASH_LAYOUT						\
+	"fdt_addr=FDFC0000\0"						\
+	"kernel_addr=FC0A0000\0"					\
+	"ramdisk_addr=FC200000\0"
 #else	/* !CONFIG_TQM5200_B */
 #define ENV_FLASH_LAYOUT						\
 	"fdt_addr=FC0A0000\0"						\
@@ -291,7 +300,9 @@
 		":${hostname}:${netdev}:off panic=1\0"			\
 	"addcons=setenv bootargs ${bootargs} "				\
 		"console=${console},${baudrate}\0"			\
-	"flash_self_old=sete console ttyS0; run ramargs addip addcons;"	\
+	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
+	"flash_self_old=sete console ttyS0; "				\
+		"run ramargs addip addcons addmtd; "			\
 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
 	"flash_self=run ramargs addip addcons;"				\
 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"	\
@@ -303,7 +314,7 @@
 		"sete console ttyS0; run nfsargs addip addcons;bootm\0"	\
 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
 		"tftp ${fdt_addr_r} ${fdt_file}; "			\
-		"run nfsargs addip addcons; "				\
+		"run nfsargs addip addcons addmtd; "			\
 		"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"		\
 	CUSTOM_ENV_SETTINGS						\
 	"load=tftp 200000 ${u-boot}\0"					\
@@ -418,12 +429,12 @@
 /* Dynamic MTD partition support */
 #define CONFIG_CMD_MTDPARTS
 #define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT		"nor0=TQM5200-0"
+#define MTDIDS_DEFAULT		"nor0=fc000000.flash"
 
-#ifdef CONFIG_STK52XX
+#if defined(CONFIG_STK52XX)
 # if defined(CONFIG_TQM5200_B)
 #  if defined(CONFIG_SYS_LOWBOOT)
-#   define MTDPARTS_DEFAULT	"mtdparts=TQM5200-0:1m(firmware),"	\
+#   define MTDPARTS_DEFAULT	"mtdparts=fc000000.flash:1m(firmware),"	\
 						"256k(dtb),"		\
 						"2304k(kernel),"	\
 						"2560k(small-fs),"	\
@@ -431,7 +442,7 @@
 						"8m(misc),"		\
 						"16m(big-fs)"
 #  else	/* highboot */
-#   define MTDPARTS_DEFAULT	"mtdparts=TQM5200-0:2560k(kernel),"	\
+#   define MTDPARTS_DEFAULT	"mtdparts=fc000000.flash:2560k(kernel),"\
 						"3584k(small-fs),"	\
 						"2m(initrd),"		\
 						"8m(misc),"		\
@@ -439,7 +450,7 @@
 						"1m(firmware)"
 #  endif /* CONFIG_SYS_LOWBOOT */
 # else	/* !CONFIG_TQM5200_B */
-#   define MTDPARTS_DEFAULT	"mtdparts=TQM5200-0:640k(firmware),"	\
+#   define MTDPARTS_DEFAULT	"mtdparts=fc000000.flash:640k(firmware),"\
 						"128k(dtb),"		\
 						"2304k(kernel),"	\
 						"2m(initrd),"		\
@@ -448,12 +459,19 @@
 						"15m(big-fs)"
 # endif /* CONFIG_TQM5200_B */
 #elif defined (CONFIG_CAM5200)
-#   define MTDPARTS_DEFAULT	"mtdparts=TQM5200-0:768k(firmware),"	\
+#   define MTDPARTS_DEFAULT	"mtdparts=fc000000.flash:768k(firmware),"\
 						"1792k(kernel),"	\
 						"5632k(rootfs),"	\
 						"24m(home)"
+#elif defined (CONFIG_CHARON)
+#   define MTDPARTS_DEFAULT	"mtdparts=fc000000.flash:640k(firmware),"\
+						"1408k(kernel),"	\
+						"2m(initrd),"		\
+						"4m(small-fs),"		\
+						"24320k(big-fs),"	\
+						"256k(dts)"
 #elif defined (CONFIG_FO300)
-#   define MTDPARTS_DEFAULT	"mtdparts=TQM5200-0:640k(firmware),"	\
+#   define MTDPARTS_DEFAULT	"mtdparts=fc000000.flash:640k(firmware),"\
 						"1408k(kernel),"	\
 						"2m(initrd),"		\
 						"4m(small-fs),"		\
@@ -566,6 +584,7 @@
  * use PSC1: Bits 29-31 (mask: 0x00000007):
  *	 100 -> UART (on all boards).
  */
+#if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
 #if defined (CONFIG_MINIFAP)
 # define CONFIG_SYS_GPS_PORT_CONFIG	0x91000004
 #elif defined (CONFIG_STK52XX)
@@ -585,6 +604,7 @@
 #else  /* TMQ5200 Inbetriebnahme-Board */
 # define CONFIG_SYS_GPS_PORT_CONFIG	0x81000004
 #endif
+#endif
 
 /*
  * RTC configuration
diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h
new file mode 100644
index 0000000000..706365f809
--- /dev/null
+++ b/include/configs/aspenite.h
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2010
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ * Contributor: Mahavir Jain <mjain@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __CONFIG_ASPENITE_H
+#define __CONFIG_ASPENITE_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING	"\nMarvell-Aspenite DB"
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_SHEEVA_88SV331xV5	1	/* CPU Core subversion */
+#define CONFIG_ARMADA100		1	/* SOC Family Name */
+#define CONFIG_ARMADA168		1	/* SOC Used on this Board */
+#define CONFIG_MACH_ASPENITE			/* Machine type */
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH		/* Declare no flash (NOR/SPI) */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+/*
+ * Environment variables configurations
+ */
+#define CONFIG_ENV_IS_NOWHERE	1	/* if env in SDRAM */
+#define CONFIG_ENV_SIZE	0x20000	/* 64k */
+
+#endif	/* __CONFIG_ASPENITE_H */
diff --git a/include/configs/charon.h b/include/configs/charon.h
new file mode 100644
index 0000000000..f29ceafb6b
--- /dev/null
+++ b/include/configs/charon.h
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2003-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2006
+ * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
+ *
+ * (C) Copyright 2010
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_CHARON_H
+#define __CONFIG_CHARON_H
+
+#define CONFIG_CHARON
+#define CONFIG_HOSTNAME		charon
+
+#define CONFIG_SYS_GPS_PORT_CONFIG	0x81550414
+
+/* include common defines/options for TQM52xx boards */
+#include "TQM5200.h"
+
+/* defines special on charon board */
+#undef CONFIG_RTC_MPC5200
+#undef CONFIG_CMD_DATE
+
+#undef CUSTOM_ENV_SETTINGS
+#define CUSTOM_ENV_SETTINGS					\
+	"bootfile=/tftpboot/charon/uImage\0"			\
+	"fdt_file=/tftpboot/charon/charon.dtb\0"		\
+	"u-boot=/tftpboot/charon/u-boot.bin\0"			\
+	"mtdparts=" MTDPARTS_DEFAULT "\0"			\
+	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"
+
+
+/* additional features on charon board */
+#define CONFIG_RESET_PHY_R
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_I2C_MULTI_BUS
+
+#define CONFIG_SYS_TFP410_ADDR	0x38
+#define CONFIG_SYS_TFP410_BUS	0
+
+/*
+ * FPGA configuration
+ */
+#define CONFIG_SYS_CS3_START		0xE8000000
+#define CONFIG_SYS_CS3_SIZE		0x80000	/* 512 KByte */
+
+/*
+ * CS3 Config Register Init:
+ * 	CS3 Enabled
+ * 	AddrBus: 8bits
+ *  	DataBus: 4bytes
+ *  	Multiplexed: Yes
+ *  	MuxBank: 00
+ */
+#define CONFIG_SYS_CS3_CFG		0x00009310
+
+#endif /* __CONFIG_CHARON_H */
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 4224258a9a..bbb5a9b160 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -27,6 +27,7 @@
  * Board
  */
 #define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_USE_SPIFLASH
 
 /*
  * SoC Configuration
@@ -71,6 +72,15 @@
 #define CONFIG_BAUDRATE		115200		/* Default baud rate */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
+#define CONFIG_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_DAVINCI_SPI
+#define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
+#define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
+#define CONFIG_SF_DEFAULT_SPEED		30000000
+#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
+
 /*
  * I2C Configuration
  */
@@ -78,6 +88,7 @@
 #define CONFIG_DRIVER_DAVINCI_I2C
 #define CONFIG_SYS_I2C_SPEED		25000
 #define CONFIG_SYS_I2C_SLAVE		10 /* Bogus, master-only in U-Boot */
+#define CONFIG_SYS_I2C_EXPANDER_ADDR   0x20
 
 /*
  * Flash & Environment
@@ -115,6 +126,16 @@
 #define CONFIG_NET_MULTI
 #endif
 
+#ifdef CONFIG_USE_SPIFLASH
+#undef CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE			(64 << 10)
+#define CONFIG_ENV_OFFSET		(256 << 10)
+#define CONFIG_ENV_SECT_SIZE		(64 << 10)
+#define CONFIG_SYS_NO_FLASH
+#endif
+
 /*
  * U-Boot general configuration
  */
@@ -179,6 +200,14 @@
 #define CONFIG_CMD_UBIFS
 #endif
 
+#ifdef CONFIG_USE_SPIFLASH
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SAVEENV
+#endif
+
 #if !defined(CONFIG_USE_NAND) && \
 	!defined(CONFIG_USE_NOR) && \
 	!defined(CONFIG_USE_SPIFLASH)
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
new file mode 100644
index 0000000000..48ce9453f4
--- /dev/null
+++ b/include/configs/ea20.h
@@ -0,0 +1,192 @@
+/*
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on davinci_dvevm.h. Original Copyrights follow:
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Board
+ */
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_USE_SPIFLASH
+#define CONFIG_DRIVER_TI_EMAC_USE_RMII
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MACH_DAVINCI_DA850_EVM
+#define CONFIG_ARM926EJS		/* arm926ejs CPU core */
+#define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
+#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
+#define CONFIG_SYS_OSCIN_FREQ		24000000
+#define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
+#define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE		0xc1080000
+
+/*
+ * Memory Info
+ */
+#define CONFIG_SYS_MALLOC_LEN	(0x10000 + 1*1024*1024) /* malloc() len */
+#define PHYS_SDRAM_1		DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
+#define PHYS_SDRAM_1_SIZE	(64 << 20) /* SDRAM size 64MB */
+#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
+
+/* memtest start addr */
+#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
+
+/* memtest will be run on 16MB */
+#define CONFIG_SYS_MEMTEST_END	(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
+
+#define CONFIG_NR_DRAM_BANKS	1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE	(256*1024) /* regular stack */
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size */
+#define CONFIG_SYS_NS16550_COM1	DAVINCI_UART2_BASE /* Base address of UART2 */
+#define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+#define CONFIG_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_DAVINCI_SPI
+#define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
+#define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
+#define CONFIG_SF_DEFAULT_SPEED		30000000
+#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
+
+/*
+ * Network & Ethernet Configuration
+ */
+#ifdef CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM	0
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT	10
+#define CONFIG_NET_MULTI
+#endif
+
+#ifdef CONFIG_USE_SPIFLASH
+#undef CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE			(8 << 10)
+#define CONFIG_ENV_OFFSET		(256 << 10)
+#define CONFIG_ENV_SECT_SIZE		(64 << 10)
+#define CONFIG_SYS_NO_FLASH
+#endif
+
+/*
+ * U-Boot general configuration
+ */
+#define CONFIG_BOOTFILE		"uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT	"ea20 > " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS	16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR	(PHYS_SDRAM_1 + 0x700000)
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/*
+ * Linux Information
+ */
+#define LINUX_BOOT_PARAM_ADDR	(PHYS_SDRAM_1 + 0x100)
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTDELAY	3
+
+/*
+ * U-Boot commands
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_MEMORY
+
+#ifndef CONFIG_DRIVER_TI_EMAC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PING
+#endif
+
+#ifdef CONFIG_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_LZO
+#define CONFIG_RBTREE
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#endif
+
+#ifdef CONFIG_USE_SPIFLASH
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SAVEENV
+#endif
+
+#if !defined(CONFIG_USE_NAND) && \
+	!defined(CONFIG_USE_NOR) && \
+	!defined(CONFIG_USE_SPIFLASH)
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_SIZE		(16 << 10)
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_ENV
+#endif
+
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		0xc0000000
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+					GENERATED_GBL_DATA_SIZE)
+#endif /* __CONFIG_H */
diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h
new file mode 100644
index 0000000000..23a88d0b6c
--- /dev/null
+++ b/include/configs/hawkboard.h
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on davinci_dvevm.h. Original Copyrights follow:
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Board
+ */
+#define	CONFIG_SYS_USE_NAND	1
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MACH_DAVINCI_HAWK
+#define CONFIG_ARM926EJS		/* arm926ejs CPU core */
+#define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
+#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
+#define CONFIG_SYS_OSCIN_FREQ		24000000
+#define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
+#define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_UART_U_BOOT)
+#define CONFIG_SYS_TEXT_BASE		0xc1080000
+#else
+#define CONFIG_SYS_TEXT_BASE		0xc1180000
+#endif
+
+/*
+ * Memory Info
+ */
+#define CONFIG_SYS_MALLOC_LEN		(1*1024*1024) /* malloc() len */
+#define PHYS_SDRAM_1			DAVINCI_DDR_EMIF_DATA_BASE
+#define PHYS_SDRAM_1_SIZE		(128 << 20) /* SDRAM size 128MB */
+#define CONFIG_SYS_SDRAM_BASE		0xc0000000
+#define CONFIG_MAX_RAM_BANK_SIZE	(512 << 20)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 -\
+					GENERATED_GBL_DATA_SIZE)
+
+/* memtest start addr */
+#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1)
+
+/* memtest will be run on 16MB */
+#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1 + 16*1024*1024)
+
+#define CONFIG_NR_DRAM_BANKS		1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE		(256*1024) /* regular stack */
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	-4
+#define CONFIG_SYS_NS16550_COM1		DAVINCI_UART2_BASE
+#define CONFIG_SYS_NS16550_CLK		clk_get(DAVINCI_UART2_CLKID)
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Network & Ethernet Configuration
+ */
+#define CONFIG_EMAC_MDIO_PHY_NUM	0x7
+#if !defined(CONFIG_NAND_SPL)
+#define CONFIG_DRIVER_TI_EMAC
+#endif
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT		10
+#define CONFIG_NET_MULTI
+
+/*
+ * Nand Flash
+ */
+#ifdef CONFIG_SYS_USE_NAND
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SIZE			(128 << 10)
+#define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
+#define CONFIG_CLE_MASK			0x10
+#define CONFIG_ALE_MASK			0x8
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#define CFG_DAVINCI_STD_NAND_LAYOUT
+#define CONFIG_SYS_NAND_CS		3
+#define CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
+/* Max number of NAND devices */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE_LIST	{ 0x62000000, }
+#define NAND_MAX_CHIPS			1
+/* Block 0--not used by bootcode */
+#define CONFIG_ENV_OFFSET		0x0
+
+#define CONFIG_SYS_NAND_PAGE_SIZE	(2 << 10)
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0xe0000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x40000
+#define CONFIG_SYS_NAND_U_BOOT_DST	0xc1180000
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	(CONFIG_SYS_NAND_U_BOOT_DST - \
+					CONFIG_SYS_NAND_U_BOOT_SIZE - \
+					CONFIG_SYS_MALLOC_LEN -       \
+					GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_NAND_ECCPOS		{				\
+				24, 25, 26, 27, 28,			\
+				29, 30, 31, 32, 33, 34, 35, 36, 37, 38,	\
+				39, 40, 41, 42, 43, 44, 45, 46, 47, 48,	\
+				49, 50, 51, 52, 53, 54, 55, 56, 57, 58,	\
+				59, 60, 61, 62, 63 }
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	10
+#define CONFIG_SYS_NAND_ECCSTEPS	(CONFIG_SYS_NAND_PAGE_SIZE /	 \
+					 CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_ECCTOTAL	(CONFIG_SYS_NAND_ECCBYTES *	\
+					CONFIG_SYS_NAND_ECCSTEPS)
+#endif /* CONFIG_SYS_USE_NAND */
+
+/*
+ * U-Boot general configuration
+ */
+#define CONFIG_MISC_INIT_R
+#define CONFIG_BOOTFILE		"uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT	"hawkboard > " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS	16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR	(PHYS_SDRAM_1 + 0x700000)
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/*
+ * Linux Information
+ */
+#define LINUX_BOOT_PARAM_ADDR	(CONFIG_SYS_MEMTEST_START + 0x100)
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS		\
+	"mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
+					"4M ip=static"
+#define CONFIG_BOOTDELAY	3
+
+/*
+ * U-Boot commands
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_MEMORY
+
+#ifdef CONFIG_SYS_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+#endif
+
+#ifndef CONFIG_DRIVER_TI_EMAC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PING
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index 9b116e690e..b19d54481f 100644
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -44,6 +44,7 @@
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE	0xFFE00000	/* Standard: boot low */
 #endif
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds"
 
 #define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
 
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 4c9744ca4f..aedf495104 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -43,6 +43,8 @@
 
 #define CONFIG_SYS_CLK_FREQ	33300000	/* external freq to pll	*/
 
+#define CONFIG_4xx_DCACHE		/* enable cache in SDRAM	*/
+
 #define CONFIG_BOARD_EARLY_INIT_F	/* Call board_early_init_f	*/
 #define CONFIG_BOARD_EARLY_INIT_R	/* Call board_early_init_r	*/
 #define CONFIG_BOARD_POSTCLK_INIT	/* Call board_postclk_init	*/
@@ -321,6 +323,8 @@
 /* Update size in "reg" property of NOR FLASH device tree nodes */
 #define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
 
+#define CONFIG_FIT			/* enable FIT image support	*/
+
 #define	CONFIG_POST_KEY_MAGIC	"3C+3E"	/* press F3 + F5 keys to force POST */
 
 #define	CONFIG_PREBOOT		"setenv bootdelay 15"
@@ -393,16 +397,18 @@
 #define CONFIG_VIDEO_SW_CURSOR
 #define CONFIG_SPLASH_SCREEN
 
-/* USB */
-#ifdef CONFIG_440EPX
-#define CONFIG_USB_OHCI
+/*
+ * USB/EHCI
+ */
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support	*/
+#define CONFIG_USB_EHCI_PPC4XX		/* on PPC4xx platform		*/
+#define CONFIG_SYS_PPC4XX_USB_ADDR	0xe0000300
+#define CONFIG_EHCI_DCACHE		/* with dcache handling support	*/
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
 #define CONFIG_USB_STORAGE
 
-/* Comment this out to enable USB 1.1 device */
-#define USB_2_0_DEVICE
-
-#endif /* CONFIG_440EPX */
-
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index 0a761639dd..97b69713a1 100644
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -39,6 +39,7 @@
 #define CONFIG_MARVELL		1
 #define CONFIG_ARM926EJS	1	/* Basic Architecture */
 
+/* ====> Kirkwood Platform Common Definations */
 #if defined(CONFIG_KIRKWOOD)
 #define CONFIG_MD5	/* get_random_hex on krikwood needs MD5 support */
 #define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
@@ -54,27 +55,46 @@
 #define	CONFIG_SYS_KWD_CONFIG	$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
 #endif /* CONFIG_SYS_KWD_CONFIG */
 
-/*
- * CONFIG_SYS_TEXT_BASE can be defined in board specific header file, if needed
- */
-#ifndef CONFIG_SYS_TEXT_BASE
-#define	CONFIG_SYS_TEXT_BASE	0x00600000
-#endif /* CONFIG_SYS_TEXT_BASE */
+/* Kirkwood has 2k of Security SRAM, use it for SP */
+#define CONFIG_SYS_INIT_SP_ADDR		0xC8012000
+#define CONFIG_NR_DRAM_BANKS_MAX	2
 
 #define CONFIG_I2C_MVTWSI_BASE	KW_TWSI_BASE
-#define MV_UART0_BASE		KW_UART0_BASE
+#define MV_UART_CONSOLE_BASE	KW_UART0_BASE
 #define MV_SATA_BASE		KW_SATA_BASE
 #define MV_SATA_PORT0_OFFSET	KW_SATA_PORT0_OFFSET
 #define MV_SATA_PORT1_OFFSET	KW_SATA_PORT1_OFFSET
 
+/* ====> ARMADA100 Platform Common Definations */
+#elif defined (CONFIG_ARMADA100)
+
+#define CONFIG_SYS_TCLK		(14745600)	/* NS16550 clk config */
+#define CONFIG_SYS_HZ_CLOCK	(3250000)	/* Timer Freq. 3.25MHZ */
+#define CONFIG_MARVELL_MFP			/* Enable mvmfp driver */
+#define MV_MFPR_BASE		ARMD1_MFPR_BASE
+#define MV_UART_CONSOLE_BASE	ARMD1_UART1_BASE
+#define CONFIG_SYS_NS16550_IER	(1 << 6)	/* Bit 6 in UART_IER register
+						represents UART Unit Enable */
+/*
+ * There is no internal RAM in ARMADA100, using DRAM
+ * TBD: dcache to be used for this
+ */
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE - 0x00200000)
+#define CONFIG_NR_DRAM_BANKS_MAX	2
+
 #else
-#error "Unsupported SoC"
+#error "Unsupported SoC Platform..."
 #endif
 
+/*
+ * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define	CONFIG_SYS_TEXT_BASE	0x00600000
+#endif /* CONFIG_SYS_TEXT_BASE */
+
 /* additions for new ARM relocation support */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-/* Kirkwood has 2k of Security SRAM, use it for SP */
-#define CONFIG_SYS_INIT_SP_ADDR		0xC8012000
+#define CONFIG_SYS_SDRAM_BASE	0x00000000
 
 /*
  * CLKs configurations
@@ -88,7 +108,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
-#define CONFIG_SYS_NS16550_COM1		MV_UART0_BASE
+#define CONFIG_SYS_NS16550_COM1		MV_UART_CONSOLE_BASE
 
 /*
  * Serial Port configuration
@@ -156,25 +176,37 @@
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
 #define CONFIG_ARCH_CPU_INIT	/* call arch_cpu_init() */
+#ifndef CONFIG_ARMADA100	/* will be removed latter */
 #define CONFIG_ARCH_MISC_INIT	/* call arch_misc_init() */
+#endif /* CONFIG_ARMADA100 */
 #define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */
 #define CONFIG_DISPLAY_CPUINFO	/* Display cpu info */
-#define CONFIG_NR_DRAM_BANKS	4
 #define CONFIG_STACKSIZE	0x00100000	/* regular stack- 1M */
 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
-#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
-#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
+#define CONFIG_SYS_MEMTEST_START 0x00800000	/* 8M */
+#define CONFIG_SYS_MEMTEST_END	0x00ffffff	/*(_16M -1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
 
 /*
+ * DRAM Banks configuration, Custom config can be done in <board>.h
+ */
+#ifndef CONFIG_NR_DRAM_BANKS
+#define CONFIG_NR_DRAM_BANKS	CONFIG_NR_DRAM_BANKS_MAX
+#else
+#if (CONFIG_NR_DRAM_BANKS > CONFIG_NR_DRAM_BANKS_MAX)
+#error CONFIG_NR_DRAM_BANKS Configurated more than available
+#endif
+#endif /* CONFIG_NR_DRAM_BANKS */
+
+/*
  * Ethernet Driver configuration
  */
 #ifdef CONFIG_CMD_NET
 #define CONFIG_CMD_MII
 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
 #define CONFIG_NET_MULTI	/* specify more that one ports available */
-#define	CONFIG_MII		/* expose smi ove miiphy interface */
+#define CONFIG_MII		/* expose smi ove miiphy interface */
 #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
@@ -232,6 +264,7 @@
 /*
  * File system
  */
+#ifndef CONFIG_ARMADA100	/* will be removed latter */
 #define CONFIG_CMD_EXT2
 #define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_FAT
@@ -242,5 +275,6 @@
 #define CONFIG_MTD_PARTITIONS
 #define CONFIG_CMD_MTDPARTS
 #define CONFIG_LZO
+#endif /* CONFIG_ARMADA100 */
 
 #endif /* _MV_COMMON_H */
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 56363f762b..5cfa4cb69a 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -335,4 +335,6 @@ extern unsigned int boot_flash_type;
 					 CONFIG_SYS_INIT_RAM_SIZE - \
 					 GENERATED_GBL_DATA_SIZE)
 
+#define CONFIG_OMAP3_SPI
+
 #endif /* __CONFIG_H */
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index d2883336b9..9a8bb7334c 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -102,6 +102,7 @@
 
 /* TWL6030 */
 #define CONFIG_TWL6030_POWER		1
+#define CONFIG_CMD_BAT			1
 
 /* MMC */
 #define CONFIG_GENERIC_MMC		1
diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h
index 5761f20a19..2ed189ef67 100644
--- a/include/configs/rsdproto.h
+++ b/include/configs/rsdproto.h
@@ -40,6 +40,7 @@
 #define CONFIG_CPM2		1	/* Has a CPM2 */
 
 #define	CONFIG_SYS_TEXT_BASE	0xff000000
+#define	CONFIG_SYS_LDSCRIPT	"board/rsdproto/u-boot.lds"
 
 #define	CONFIG_MISC_INIT_F	1	/* Use misc_init_f()		*/
 
diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h
index 6115a5f413..2a731a637b 100644
--- a/include/configs/t3corp.h
+++ b/include/configs/t3corp.h
@@ -120,11 +120,16 @@
  */
 #define CONFIG_SYS_FLASH_CFI		/* The flash is CFI compatible	*/
 #define CONFIG_FLASH_CFI_DRIVER		/* Use common CFI driver	*/
-#define CONFIG_SYS_FLASH_CFI_AMD_RESET	1	/* Use AMD reset cmd */
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* use status poll method	*/
+#define CONFIG_SYS_FLASH_PROTECTION	/* use hardware flash protection */
 
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks */
+#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE, \
+			(CONFIG_SYS_FPGA1_BASE + 0x01000000) }
+#define CONFIG_SYS_CFI_FLASH_CONFIG_REGS { 0xffff,	/* don't set	*/ \
+			0xbddf }		/* set async read mode	*/
+#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max num of memory banks */
 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* max num of sectors p. chip*/
 
 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase/ms*/
@@ -355,6 +360,7 @@
 	"ramdisk_addr=fc200000\0"					\
 	"pciconfighost=1\0"						\
 	"pcie_mode=RP:RP\0"						\
+	"unlock=yes\0"							\
 	""
 
 /*
@@ -423,7 +429,7 @@
 				 EBC_BXAP_WBN_ENCODE(0)		|	\
 				 EBC_BXAP_WBF_ENCODE(0)		|	\
 				 EBC_BXAP_TH_ENCODE(1)		|	\
-				 EBC_BXAP_RE_DISABLED		|	\
+				 EBC_BXAP_RE_ENABLED		|	\
 				 EBC_BXAP_SOR_DELAYED		|	\
 				 EBC_BXAP_BEM_RW		|	\
 				 EBC_BXAP_PEN_DISABLED)
@@ -440,7 +446,7 @@
 				 EBC_BXAP_WBN_ENCODE(0)		|	\
 				 EBC_BXAP_WBF_ENCODE(0)		|	\
 				 EBC_BXAP_TH_ENCODE(1)		|	\
-				 EBC_BXAP_RE_DISABLED		|	\
+				 EBC_BXAP_RE_ENABLED		|	\
 				 EBC_BXAP_SOR_DELAYED		|	\
 				 EBC_BXAP_BEM_RW		|	\
 				 EBC_BXAP_PEN_DISABLED)
@@ -457,7 +463,7 @@
 				 EBC_BXAP_WBN_ENCODE(0)		|	\
 				 EBC_BXAP_WBF_ENCODE(0)		|	\
 				 EBC_BXAP_TH_ENCODE(1)		|	\
-				 EBC_BXAP_RE_DISABLED		|	\
+				 EBC_BXAP_RE_ENABLED		|	\
 				 EBC_BXAP_SOR_DELAYED		|	\
 				 EBC_BXAP_BEM_RW		|	\
 				 EBC_BXAP_PEN_DISABLED)
diff --git a/include/configs/uc101.h b/include/configs/uc101.h
index 483534c41c..f13669181c 100644
--- a/include/configs/uc101.h
+++ b/include/configs/uc101.h
@@ -35,6 +35,7 @@
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE	0xFFF00000
 #endif
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds"
 
 #include "manroland/common.h"
 #include "manroland/mpc5200-common.h"
diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h
index 2422c0b0c3..bd7bac0976 100644
--- a/include/configs/xilinx-ppc.h
+++ b/include/configs/xilinx-ppc.h
@@ -50,6 +50,7 @@
 #undef CONFIG_CMD_DHCP
 #undef CONFIG_CMD_EEPROM
 #undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_NFS
 
 /*Misc*/
 #define CONFIG_BOOTDELAY		5/* autoboot after 5 seconds     */